MC145572APB Freescale Semiconductor, MC145572APB Datasheet - Page 26

• Manufacturer Part Number: MC145572APB
• Description: IC ISDN INTERFACE TXCVER 44-LQFP
• Manufacturer: Freescale Semiconductor
• Type: Transceiverr

Specifications of MC145572APB

• Protocol: RS232
• Voltage - Supply: 5V
• Mounting Type: Surface Mount
• Package / Case: 44-LQFP
• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Lead Free Status / Rohs Status: Not Compliant

512 kHz by the setting of S3-4, GCI2048/GCI512.
NTCLK or NTGTCLK: Gated IDL Clock Output.
This pin provides a gated clock output. The clock input of an external bit error rate tester should be
connected to this signal.
GND: Ground.
Negative Power Supply.
Note that the M and the A bits used in the IDL interface of the MC145574 S/T-Interface Transceiver are
not used by the MC145572, and, therefore, are not driven by the MC145572.
NTFSR: (NT U-Interface Transceiver Pin FSR).
This pin is an input when the MC145572 is conÞgured for slave mode and an output when conÞgured for
master mode, as established by switch S4-1, MAS/SLV. In the master mode this output is phase locked
to the signal received at the NT1 U-Interface. This signal is associated with data output from the D
of the MC145572. This signal is also connected to the FSC/FSR pin of the MC145574 S/T-Transceiver.
NTFSX: (NT U-Interface Transceiver Pin FSX).
This pin is an input when the MC145572 is conÞgured for slave mode and an output when conÞgured for
master mode, as established by switch S2-1, MAS/SLV. In the master mode this output is phase locked
to the signal received at the NT1 U-Interface. This signal is associated with data input to the D
MC145572.
STIRQ: Interrupt Request T (S/T-Interface Transceiver IRQ).
The STIRQ pin is an active low open drain output used to signal the MCU devices that an interrupt condition
exists in the MC145574 S/T-Interface Transceiver. On clearing the interrupt condition, the STIRQ pin is
returned to the high impedance state.
NTSFAX: Transmit Superframe Alignment.
This pin carries a signal that indicates the Þrst 2B+D frame in a U superframe to be transmitted onto the
U-Interface. This signal is not active when the NT side MC145572 is conÞgured for full GCI mode operation.
NTSFAR: Receive Superframe Alignment.
This pin carries a signal that indicates the Þrst 2B+D frame in a U superframe to be received from the
U-Interface. This signal is not active when the NT side MC145572 is conÞgured for full GCI mode operation.
NTFREF: Synchronized Clock Out, MCU Mode.
When the NT side MC145572 is conÞgured for MCU mode operation, S4-4 in IDL2 position, this pin
provides the recovered timing clock. The frequency of the clock at this pin is selected by programming the
NT side MC145572 registers BR7(b4) and OR7(b4).
NTFREFO: Synchronized Clock Out, GCI Mode.
When the NT side MC145572 is conÞgured for full GCI mode operation, S4-4 in GCI position, this pin
provides the recovered timing clock. The frequency of the clock is selected between 2.048 MHz and
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
MC145572EVK
in
pin of the
out
pin
27