CYV15G0101DXB-BBC Cypress Semiconductor Corp, CYV15G0101DXB-BBC Datasheet - Page 21
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CYV15G0101DXB-BBC
Manufacturer Part Number
CYV15G0101DXB-BBC
Description
IC TXRX HOTLINK 100-LBGA
Manufacturer
Cypress Semiconductor Corp
Series
HOTlink II™r
Type
Transceiverr
Datasheet
1.CYP15G0101DXB-BBXC.pdf
(39 pages)
Specifications of CYV15G0101DXB-BBC
Package / Case
100-LBGA
Protocol
Fibre Channel
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Product
PHY
Supply Voltage (min)
3.135 V
Supply Current
0.5 A
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Number Of Channels
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CYV15G0101DXB-BBC
Manufacturer:
CYPRESS
Quantity:
850
Company:
Part Number:
CYV15G0101DXB-BBC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Document #: 38-02031 Rev. *J
The BIST state machine has multiple states, as shown in
Figure 2 and Table 16. When the receive PLL detects an
out-of-lock condition, the BIST state is forced to the
Start-of-BIST state, regardless of the present state of the BIST
state machine. If the number of detected errors ever exceeds
the number of valid matches by greater than 16, the state
machine is forced to the WAIT_FOR_BIST state where it
monitors the interface for the first character (D0.0) of the next
BIST sequence. Also, if the Elasticity Buffer ever hits and
overflow/underflow condition, the status is forced to the
BIST_START until the buffer is re-centered (approximately
nine character periods).
To ensure compatibility between the source and destination
systems when operating in BIST, the sending and receiving
ends of the BIST sequence must use the same clock setup
(RXCKSEL = MID or RXCKSEL = LOW).
Table 16. Receive Character Status Bits
RXST[2:
000
001
010
011
100
101
110
111
0]
Priori-
ty
7
7
2
5
4
1
6
3
Normal Character Received. The valid Data character on the output bus
meets all the formatting requirements of Data characters listed in Table 20.
Special Code Detected. The valid special character on the output bus
meets all the formatting requirements of the Special Code characters listed
in Table 21, but is not the presently selected framing character or a Decoder
violation indication.
Receive Elasticity Buffer
Underrun/Overrun Error. The
receive buffer was not able to
add/drop a K28.5 or framing
character.
Framing Character Detected. This indicates that a character matching the
patterns identified as a framing character (as selected by FRAMCHAR) was
detected. The decoded value of this character is present on the output bus.
Codeword Violation. The character on the output bus is a C0.7. This
indicates that the received character cannot be decoded into any valid
character.
PLL Out of Lock. This indicates a PLL Out of Lock condition.
Running Disparity Error. The character on the output bus is a C4.7, C1.7,
or C2.7.
RESERVED
Type-A Status
RESERVED
JTAG Support
The CYP(V)(W)15G0101DXB contains a JTAG port to allow
system level diagnosis of device interconnect. Of the available
JTAG modes, only boundary scan is supported. This capability
is present only on the LVTTL inputs, LVTTL outputs and the
REFCLK± clock input. The high-speed serial inputs and
outputs are not part of the JTAG test chain.
JTAG ID
The JTAG device ID for the CYP(V)(W)15G0101DXB is
“1C804069”x.
3-Level Select Inputs
Each 3-Level select input reports as two bits in the scan
register. These bits report the LOW, MID, and HIGH state of
the associated input as 00, 10, and 11, respectively.
Description
Type-B Status
CYW15G0101DXB
BIST Data Compare.
Character compared correctly
BIST Command Compare.
Character compared correctly
BIST Last Good. Last
Character of BIST sequence
detected and valid.
RESERVED
BIST Last Bad. Last Character
of BIST sequence detected
invalid.
BIST Start. Receive BIST is
enabled on this channel, but
character compares have not
yet commenced. This also
indicates a PLL Out of Lock
condition, and Elasticity Buffer
overflow/underflow conditions.
BIST Error. While comparing
characters, a mismatch was
found in one or more of the
decoded character bits.
BIST Wait. The receiver is
comparing characters. but has
not yet found the start of BIST
character to enable the LFSR.
CYV15G0101DXB
CYP15G0101DXB
(Receive BIST = Enabled)
Receive BIST Status
Page 21 of 39
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