ISP1301BS-T ST-Ericsson Inc, ISP1301BS-T Datasheet - Page 10
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ISP1301BS-T
Manufacturer Part Number
ISP1301BS-T
Description
IC USB OTG TRANSCEIVER 24-HVQFN
Manufacturer
ST-Ericsson Inc
Type
Transceiverr
Datasheet
1.ISP1301BSTS.pdf
(52 pages)
Specifications of ISP1301BS-T
Number Of Drivers/receivers
1/1
Protocol
USB 2.0
Voltage - Supply
2.7 V ~ 4.5 V
Mounting Type
Surface Mount
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-1881-2
ISP1301BS,118
ISP1301BS,118
Philips Semiconductors
ISP1301_3
Product data sheet
7.10.1 ADR/PSW
7.10 Detailed description of pins
7.9 Power-On Reset (POR)
When V
(t
The POR function can be explained by viewing dips at t2 to t3 and t4 to t5 on the V
curve
t0 — The internal POR starts with a LOW level.
t1 — The detector will see the passing of the trip level and a delay element will add
another t
t2-t3 — The internal POR pulse will be generated whenever V
more than 11 s.
t4-t5 — The dip is too short (< 11 s) and the internal POR pulse will not react and will
remain LOW.
The ADR/PSW pin has two functions. On reset (including power-on reset), the level on
this pin is latched as ADR_REG, which represents the Least Significant Bit (LSB) of the
I
ISP1301 is 010 1100 (2Ch); if bit ADR_REG = 1, the I
010 1101 (2Dh).
After reset, the ADR/PSW pin can be programmed as an output. If in the Mode Control 2
register bit PSW_OE = 1, then the ADR/PSW output will be enabled. The logic level will
be determined by bit ADR_REG. If bit ADR_REG = 0, then the ADR/PSW pin will be
driven HIGH. If bit ADR_REG = 1, then the ADR/PSW pin will be driven LOW.
The ADR/PSW pin can be used to turn on or off the external charge pump. The ISP1301
built-in charge pump supports V
support (for example, 50 mA), an external charge pump may be needed. In this case, the
ADR/PSW pin can act as a power switch for the external charge pump.
example of using external charge pump.
2
Fig 4. Internal POR timing
PORP
C-bus address of the ISP1301. If bit ADR_REG = 0, the I
) will be typically 200 ns. The pulse is started when V
(Figure
CC
(1) PORP = Power-On Reset Pulse
PORP
t0
is powered on, an internal POR is generated. The internal POR pulse width
4).
before it drops to LOW.
t1
t
PORP
Rev. 03 — 21 February 2006
BUS
current at 8 mA. If the application needs more current
t2
t3
t
PORP
2
C-bus address for the ISP1301 is
t4
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
2
CC
C-bus address for the
t5
CC
rises above V
drops below V
USB OTG transceiver
004aaa750
Figure 5
V
PORP
ISP1301
V
POR(trip)
CC
POR(trip)
(1)
POR(trip)
shows an
CC
.
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