DS26334GN+ Maxim Integrated Products, DS26334GN+ Datasheet - Page 30

IC INTERFACE LINE 16CH 256-CSBGA

DS26334GN+

Manufacturer Part Number
DS26334GN+
Description
IC INTERFACE LINE 16CH 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Line Interface Units (LIUs)r
Datasheet

Specifications of DS26334GN+

Number Of Drivers/receivers
16/16
Protocol
IEEE 1149.1
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 5-10. Registers Related to AIS Detection
LOS/AIS Criteria Selection
Alarm Indication Signal Status
AIS Interrupt Enable
AIS Interrupt Status
5.5.8 Receive Dual-Rail Mode
Receive dual-rail mode consists of the RPOS, RNEG, and RCLK pins on the system side. In receive dual-rail
mode, B8ZS and HDB3 decoding is not available. The data that appears on the RTIP and RRING pins is output on
RPOS and RNEG without any modification. The Single-Rail Mode Select Register (SRMS) is used for selection of
dual-rail or single-rail mode. The bipolar violation (and B8ZS/HDB3) detectors detect violations in dual-rail and
single-rail modes, but in dual-rail mode the violations will only be reported to the Line Violation Detect Status
(LVDS) registers.
5.5.9 Receive Single-Rail Mode
Receive single-rail mode consists of the RPOS, RCLK, and CV pins on the system side. B8ZS or HDB3 decoding
is available. The Single-Rail Mode Select Register (SRMS) is used for selection of dual-rail or single-rail mode.
5.5.10 Bipolar Violation and Excessive Zero Detector
The DS26334 detects HDB3 code violations, BPVs, and excessive zero errors. The reporting of the errors is done
through the RNEGn/CVn pin in single-rail mode and the
violations are only detected in E1 mode with HDB3 encoding. The code violation detection declares an error when
a bipolar violation of the same polarity as the last bipolar violation is received.
Excessive zeros are detected if eight consecutive zeros are detected with B8ZS enabled and four consecutive
zeros are detected with HDB3 enabled. Excessive zero detection is enabled via the Excessive Zero Detect Enable
Register (EZDE) and when HDB3/B8ZS encoding/decoding is selected via the Line Code Selection Register (LCS).
The bits in the LCS, EZDE, and
outlines the functionality.
Table 5-11. BPV, Code Violation, and Excessive Zero Error Reporting
LCS
0
0
0
0
1
REGISTER
CONDITIONS
EZDE
X
0
0
1
1
CVDEB
X
0
1
0
1
CVDEB
LASCS
NAME
AISIE
AISI
AIS
BPV (T1)/Code Violation (E1)
BPV
Excessive Zeros and BPV (T1)/Code Violation (E1)
Excessive Zeros and BPV
BPV
DS26334 3.3V, 16-Channel, E1/T1/J1 Short/Long-Haul Line Interface Unit
registers determine the combinations that are reported.
Section criteria for AIS (T1.231, G.775, ETS 300 233 for E1).
Set when AIS is detected.
If reset, interrupt due to AIS is not generated.
Latched if there is a change in AIS and the interrupt is enabled.
30 of 121
ERRORS DETECTED
LVDS
registers in both single- and dual-rail modes. Code
FUNCTIONALITY
Table 5-11

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