DS2181AQ/T&R Maxim Integrated Products, DS2181AQ/T&R Datasheet - Page 17

IC TXRX CEPT PRIMARY RATE 44PLCC

DS2181AQ/T&R

Manufacturer Part Number
DS2181AQ/T&R
Description
IC TXRX CEPT PRIMARY RATE 44PLCC
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS2181AQ/T&R

Number Of Drivers/receivers
1/1
Protocol
CEPT
Voltage - Supply
4.5 V ~ 5.5 V
Mounting Type
Surface Mount
Package / Case
44-LCC, 44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS2181AQ/T&RDS2181AQ/T&R
Manufacturer:
Maxim Integrated
Quantity:
10 000
RECEIVE SIGNALING Table 7
NOTES: (Applicable only to CAS systems)
1. RSD is valid for the least significant nibble in each indicated timeslot. Timeslot A data appears in bit
2. RSD does not output valid data during timeslots 0 and 16.
RECEIVE MULTIFRAME TIMING Figure 15
RECEIVE TIMING
The receive side output timing set is identical to that found on the transmit side. The user can tie receive
outputs directly to the transmit inputs for drop and insert applications. The received data of RPOS, RNEG
appear at RSER after six RCLK delays, without any change except for the HDB3-to-NRZ conversion
when HDB3 is enabled.
5, B in bit 6, C in bit 7 and D in bit 8.
FRAME #
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
RSD
1
TIMESLOT #
VALID DURING
10, 27
11, 28
12, 29
13, 30
14, 31
15,
-2
1, 18
2, 19
3, 20
4, 21
5, 22
6, 23
7, 24
8, 25
9, 26
, 17
-2
17 of 32
DS2181A

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