AD9981/PCBZ Analog Devices Inc, AD9981/PCBZ Datasheet - Page 5

• Manufacturer Part Number: AD9981/PCBZ
• Manufacturer: Analog Devices Inc

Specifications of AD9981/PCBZ

• Lead Free Status / Rohs Status: Supplier Unconfirmed

AD9981 SOFTWARE CONTROL
To select the AD9981 as the target device for the DEPL
evaluation software, select Device > AD9981. This displays the
DEPL Evaluation Software – AD9981 register setup window,
as shown in Figure 2. From this window you can control every
bit within the AD9981. A detailed, bit-by-bit functional
description is provided in the AD9981 data sheet.
To update the registers in the AD9981, click Load at the top of
the window. This is true unless Load Register On Change is
checked. In this case, the appropriate register is updated as soon
as any change is made in the window. The five tabs in this
control window enable you to display groups of registers. The
selections are 00-011, 12-18, 19-24, or 25-30. Click the
appropriate tab to view/control the register desired.
PLL Settings
The PLL settings are in Registers 0x01 to 0x04. The PLL Divisor
setting (12 bits) can be set bit-by-bit (the value toggles when
clicking on the bit) by setting a value for Registers 0x01 and
0x02 (decimal value), by setting the 12-bit value (decimal
value), or by moving the control bar left (to decrease) or right
(to increase). When changing the value using one of these
methods, the change is reflected in the other three. The values
are not written to the AD9981 until you click Load.
The VCO Range and Charge Pump settings in Register 0x03
can be set by individual bit, by register, or by pull-down menu
selection.
The 5-bit Phase Adjust in Register 0x04 can be altered in the
some manner as the PLL Divisor.
Table 1 contains example PLL register settings for various video
modes. For PLL settings not included here, an Excel spreadsheet
for calculating PLL settings can be accessed under the Design
Tools section of the Analog Devices Display Electronics web site
at www.analog.com/flatpanel.
Gain and Offset Settings
The 9-bit gain control for the red, green, and blue video
channels are contained in Registers 0x05 to 0x0A and can be
changed bit-by-bit, by setting a value for the registers (decimal
value), or by moving the control bar left (to decrease) or right
(to increase). The 9-bit offset control for the red, green, and
blue channels are contained in Registers 0x0B to 0x10. These
can be set in the same manner as gain. Note that using the gain
and offset control bars at the top of their respective sections
changes all three channels by the same amount, regardless of
their setting. In other words, if, in order to achieve color
balance, your offset settings are 60, 70, and 80 for R, G, and B,
respectively, the minimum settings are 0, 10, and 20. The
maximum offset settings would then be 107, 117, and 127. To
control the gain or offset of an individual channel, separate
control bars for each color are also provided.
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Sync Separator Control
Register 0x11 contains bits for setting the Sync Separator
Threshold. The threshold can be changed bit-by-bit by setting a
value for the register (decimal value), or by moving the control
bar left (to decrease) or right (to increase). The resulting state of
the register is reflected in the box to the right.
Sync Control
Registers 0x12 to 0x15 contain bits for controlling input and
output Hsync and Vsync signals. You can toggle each bit by
clicking on it. The resulting state of the bit is reflected in the
box to the right of each bit. The HSOUT and VSOUT (if
enabled) pulse widths can also be adjusted using the control bar
to the right of their respective registers.
Coast and Clamp Control
Pre-Coast, Post-Coast, various Coast and Clamp controls, and
Clamp Placement and Duration are controlled via Registers
0x16 to 0x1B. You can toggle each bit by clicking on it. The
resulting state of the bit is reflected in the box to the right of
each bit. The pre- and post-Coast as well as the Clamp
Placement and Duration registers can also be controlled via the
sliding bar to the right of their respective registers.
Auto-Offset Control
Register 0x1B contains bits for controlling the auto-offset
function. You can toggle each bit by clicking on it. The resulting
state of the bit is reflected in the box to the right of each bit. For
more details on this function, the application note
“Implementing the Auto-Offset Function of the AD9981” can
be downloaded from our web site. This information can also be
found in the AD9981 data sheet.
SOG Control and Power Management
Registers 0x1D and 0x1E contain bits for controlling the SOG,
Input Selection,m and Power Management functions. You can
toggle each bit by clicking on it. The resulting state of the bit is
reflected in the box to the right of each bit.
Output Control
Registers 0x1 and 0x20 contain bits for controlling Output
functions. You can toggle each bit by clicking on it. The
resulting state of the bit is reflected in the box to the right of
each bit. The Output Mode bits also have pull-down menus that
can be used for output mode selection.
Sync Pulse Filter Control
Registers 0x21 to 0x23 contain the bits for controlling Sync
Pulse Filter. These controls can be modified bit by bit, by
changing the 8-bit (decimal) value or by using the slider bar
to the right of each register.
AD9981/PCB