HI-8382J Holt Integrated Circuits, HI-8382J Datasheet
HI-8382J
Specifications of HI-8382J
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HI-8382J Summary of contents
Page 1
... Inputs are provided for clocking and synchronization. These signals are AND'd with the DATA inputs to enhance system performance and allow the HI-8382 to be used in a variety of applications. Both logic and synchronization inputs feature built-in 2,000V minimum ESD input protection as well as TTL and CMOS compatibility ...
Page 2
... V other than +5V is needed, a separate +5V power supply REF is required for pin With the DATA (A) input at a logic high and DATA (B) input at a logic low, A will switch to the +V OUT REF switch to the -V rail (ARINC HIGH state). With both data ...
Page 3
... PIN DESCRIPTIONS SYMBOL FUNCTION V POWER THE REFERENCE VOLTAGE USED TO DETERMINE THE OUTPUT VOLTAGE SWING REF STROBE INPUT A LOGIC HIGH ON THIS INPUT PLACES THE DRIVER IN POWER DOWN MODE SYNC INPUT SYNCHRONIZES DATA INPUTS DATA (A) INPUT DATA INPUT TERMINAL A C INPUT CONNECTION FOR DATA (A) SLEW-RATE CAPACITOR ...
Page 4
... Output Voltage High (Output to Ground) Output Voltage Low (Output to Ground) Output Voltage Null Input Capacitance Note 1. Not tested, but characterized at initial device design and after major process and/or design change which affects this parameter. Note 2. Interchangeability of force and sense is acceptable. AC ELECTRICAL CHARACTERISTICS +V = +15V -15V ...
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... At 100% duty cycle, 15V power supplies. For 12V power supplies multiply all tabulated values by 0.8. 3. Low Speed: Data Rate = 12.5 Kbps, Load 400 Ohms nF. 4. High Speed: Data Rate = 100 Kbps, Load 400 Ohms nF. Data not presented for this is considered unrealistic for high speed operation. ...
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... HI - 838xJ x x (Plastic) NUMBER NUMBER NUMBER (1) NOT RECOMMENDED FOR NEW DESIGNS. The newer HI-3182PJxx and HI-3183PJxx are drop-in replacements for the older HI-8382Jxx and HI-8383Jxx respectively. ADDITIONAL PIN CONFIGURATIONS (See page 1 for the 16-pin Ceramic Side-Brazed DIP Package ) CLOCK HI-8382U N/C ...
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... REVISION HISTORY Revision Date Description of Change DS8382, Rev. E 02/26/09 Clarified the temperature ranges, and Note (1) in the Ordering Information. HI-8382, HI-8383 HOLT INTEGRATED CIRCUITS 7 ...
Page 8
... SQ. .173 ±.008 (4.394 ±.203) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) HI-8382 PACKAGE DIMENSIONS .810 max (20.574) .295 ±.010 (7.493 ±.254) .050 ±.005 PIN 1 (1.270 ± ...
Page 9
... CERAMIC LEADLESS CHIP CARRIER .020 INDEX (.508) PIN 1 .040 x 45° 3PLS (1.016 x 45° 3PLS) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) 32-PIN J-LEAD CERQUAD .040 typ (1.016) .019 ± .003 (.483 ± ...