PIC32MX775F256L-80V/PF Microchip Technology, PIC32MX775F256L-80V/PF Datasheet - Page 158
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PIC32MX775F256L-80V/PF
Manufacturer Part Number
PIC32MX775F256L-80V/PF
Description
256 KB Flash, 64 KB RAM, USB-OTG, Dual CAN, Ethernet, 80 MHz, 10-Bit ADC, DMA 10
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.PIC32MX575F256H-80VPT.pdf
(256 pages)
Specifications of PIC32MX775F256L-80V/PF
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
100-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX775F256L-80V/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC32MX5XX/6XX/7XX
Table
show four interfaces and the associated pins that can
be used with the Ethernet Controller.
TABLE 24-1:
TABLE 24-2:
DS61156G-page 158
EMDC
EMDIO
ETXCLK
ETXEN
ETXD0
ETXD1
ETXD2
ETXD3
ETXERR
ERXCLK
ERXDV
ERXD0
ERXD1
ERXD2
ERXD3
ERXERR
ECRS
ECOL
EMDC
EMDIO
ETXEN
ETXD0
ETXD1
EREFCLK
ECRSDV
ERXD0
ERXD1
ERXERR
Note:
Pin Name
Pin Name
24-1,
Ethernet controller pins that are not used
by selected interface can be used by other
peripherals.
Table
Management Clock
Management I/O
Transmit Clock
Transmit Enable
Transmit Data
Transmit Data
Transmit Data
Transmit Data
Transmit Error
Receive Clock
Receive Data Valid
Receive Data
Receive Data
Receive Data
Receive Data
Receive Error
Carrier Sense
Collision Indication
Management Clock
Management I/O
Transmit Enable
Transmit Data
Transmit Data
Reference Clock
Carrier Sense – Receive Data Valid
Receive Data
Receive Data
Receive Error
MII MODE DEFAULT
INTERFACE SIGNALS
(FMIIEN = 1, FETHIO = 1)
RMII MODE DEFAULT
INTERFACE SIGNALS
(FMIIEN = 0, FETHIO = 1)
24-2,
Table 24-3
Description
Description
and
Table 24-4
TABLE 24-3:
TABLE 24-4:
AEMDC
AEMDIO
AETXCLK
AETXEN
AETXD0
AETXD1
AETXD2
AETXD3
AETXERR
AERXCLK
AERXDV
AERXD0
AERXD1
AERXD2
AERXD3
AERXERR
AECRS
AECOL
Note 1:
AEMDC
AEMDIO
AETXEN
AETXD0
AETXD1
AEREFCLK
AECRSDV
AERXD0
AERXD1
AERXERR
Pin Name
Pin Name
MII Alternate Interface is not available on
64-pin devices.
Management Clock
Management I/O
Collision Indication
Management Clock
Management I/O
Carrier Sense – Receive Data Valid
Transmit Clock
Transmit Enable
Transmit Data
Transmit Data
Transmit Data
Transmit Data
Transmit Error
Receive Clock
Receive Data Valid
Receive Data
Receive Data
Receive Data
Receive Data
Receive Error
Carrier Sense
Transmit Enable
Transmit Data
Transmit Data
Reference Clock
Receive Data
Receive Data
Receive Error
MII MODE ALTERNATE
INTERFACE SIGNALS
(FMIIEN = 1, FETHIO = 0)
RMII MODE ALTERNATE
INTERFACE SIGNALS
(FMIIEN = 0, FETHIO = 0)
© 2009-2011 Microchip Technology Inc.
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