MRF24J40MCT-I/RM Microchip Technology, MRF24J40MCT-I/RM Datasheet - Page 8

• Manufacturer Part Number: MRF24J40MCT-I/RM
• Description: 2.4 GHZ IEEE 802.15.4 POWERTRA 12 MODULE Varies T/R
• Manufacturer: Microchip Technology
• Series: -r

Specifications of MRF24J40MCT-I/RM

• Frequency: 2.4GHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4
• Applications: General Purpose
• Power - Output: 19dBm
• Sensitivity: -108dBm
• Voltage - Supply: 2.7 V ~ 3.6 V
• Current - Receiving: 25mA
• Current - Transmitting: 120mA
• Data Interface: PCB, Surface Mount
• Memory Size: -
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: Module
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MRF24J40MC
1.3
The MRF24J40MC module is based on the Microchip
Technology MRF24J40 2.4 GHz IEEE 802.15.4 RF
Transceiver
configuration are documented in the “MRF24J40 Data
Sheet” (DS39776).
This section emphasizes operational settings that are
unique to the MRF24J40MC module design that must
be followed for proper operation.
1.3.1
Operation of the PA U3 and LNA U2 is controlled by the
MRF24J40 internal RF state machine through RF
switches, U1 and U4, and the GPIO1 and GPIO2 pins on
the MRF24J40.
diagram.
module.
FIGURE 1-5:
DS75002A-page 8
Connector
50 ohm
U.FL
Operation
Figure 2-2
PA/LNA CONTROL
UPG2179TB
IC.
RF Switch
Figure 1-5
V2 V1
is the schematic diagram for the
Serial
PA/LNA BLOCK DIAGRAM
shows the PA/LNA block
communication
LNA
PA
LNA
uPC8233TK
PA
uPG2250T5N
V
Voltage Regulator
TC1187VCT713
OUT
UPG2179TB
RF Switch
V2 V1
and
SHDN
Preliminary
The internal RF state machine is configured for the PA/
LNA Mode by setting TESTMODE (0x22<2:0>) = 111.
Pins GPIO1 and GPIO2 control the RF switches, PA
and LNA automatically when the MRF24J40 receives
and transmits data.
Voltage regulator U5 supplies a regulated 2.2V to the
PA. This provides a stable voltage to the PA over the V
voltage range of the module. U5 is enabled or shutdown
from GPIO3. Ensure that the GPIO3 direction has been
set to output (TRISGP3 (0x34<3>) = 1). Setting a logic
high (GPIO3(0x33<3>) = 1) enables the voltage
regulator and supplies voltage to the PA. Setting a logic
low (GPIO3 (0x33<3>) = 0) will shutdown the voltage
regulator, disabling the PA, and provides the lowest
shutdown current.
Note:
Balun
A complete explanation of the operation of
the PA/LNA control is documented in the
“MRF24J40 Data Sheet” (DS39776),
Section 4.2 “External PA/LNA Control”.
© 2011 Microchip Technology Inc.
GPIO1
GPIO2
GPIO3
RFP
RFN
MRF24J40
IN