LM5050MK-1EVAL/NOPB National Semiconductor, LM5050MK-1EVAL/NOPB Datasheet - Page 11

• Manufacturer Part Number: LM5050MK-1EVAL/NOPB
• Description: LM5050 EVAL BOARD
• Manufacturer: National Semiconductor
• Series: -r

Specifications of LM5050MK-1EVAL/NOPB

• Main Purpose: Power Management, ORing Controller / High Side
• Embedded: No
• Utilized Ic / Part: LM5050
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The OFF pin has an internal pull-down of 5 µA (typical). If the
OFF function is not required the pin may be left open or con-
nected to ground.
SHORT CIRCUIT FAILURE OF AN INPUT SUPPLY
An abrupt zero ohm short circuit across the input supply will
cause the highest possible reverse current to flow while the
internal LM5050-2 control circuitry discharges the gate of the
MOSFET. During this time, the reverse current is limited only
by the R
sistances and inductances. Worst case instantaneous re-
verse current would be limited to:
The internal Reverse Comparator will react, and will start the
process of discharging the Gate, when the reverse current
reaches:
When the MOSFET is finally switched off, the energy stored
in the parasitic wiring inductances will be transferred to the
rest of the circuit. As a result, the LM5050-2 IN pin will see a
negative voltage spike while the OUT pin will see a positive
voltage spike. The IN pin can be protected by diode clamping
the pin to GND in the negative direction. The OUT pin can be
protected with a TVS protection diode, a local bypass capac-
itor, or both. In low voltage applications, the MOSFET drainto-
source breakdown voltage rating may be adequate to protect
the OUT pin (i.e. V
FET datasheets do not guarantee the maximum breakdown
rating, so this method should be used with caution.
MOSFET Selection
The important MOSFET electrical parameters are the maxi-
mum continuous Drain current I
DS(ON)
of the MOSFET, along with parasitic wiring re-
I
D(REV)
I
D(REV)
IN
+ V
= (V
= V
(BR)DSS(MAX)
FIGURE 7.
FIGURE 8.
OUT
SD(REV)
- V
D
, the maximum Source cur-
IN
/ R
) / R
< 75V ), but most MOS-
DS(ON)
DS(ON)
30104824
30104823
11
rent (i.e. body diode) I
V
drain-to-source reverse breakdown voltage V
drain-to-source On resistance R
The maximum continuous drain current, I
ceed the maximum continuous load current. The rating for the
maximum current through the body diode, I
the same as, or slightly higher than the drain current, but body
diode current only flows while the MOSFET gate is being
charged to V
The maximum drain-to-source voltage, V
high enough to withstand the highest differential voltage seen
in the application. This would include any anticipated fault
conditions.
The drain-to-source reverse breakdown voltage, V
may provide some transient protection to the OUT pin in low
voltage applications by allowing conduction back to the IN pin
during positive transients at the OUT pin.
The gate-to-source threshold voltage, V
compatible with the LM5050-1 gate drive capabilities. Logic
level MOSFETs, with R
ommended, but sub-Logic level MOSFETs having R
rated at V
MOSFETs, with R
ommended.
The dominate MOSFET loss for the LM5050-1 active OR-ing
controller is conduction loss due to source-to-drain current to
the output load, and the R
duction loss could be reduced by using a MOSFET with the
lowest possible R
arbitrarily selecting a MOSFET based solely on having low
R
sons:
1) Reverse transition detection. Higher R
increased voltage information to the LM5050 Reverse Com-
parator at a lower reverse current level. This will give an
earlier MOSFET turn-off condition should the input voltage
become shorted to ground. This will minimize any disturbance
of the redundant bus.
2) Reverse current leakage. In cases where multiple input
supplies are closely matched it may be possible for some
small current to flow continuously through the MOSFET drain
to source (i.e. reverse) without activating the LM5050 Re-
verse Comparator. Higher R
current level.
3) Cost. Generally, as the R
of the MOSFET goes higher.
Selecting a MOSFET with an R
sult in excessive power dissipation. Additionally, the MOS-
FET gate will be charged to the full value that the LM5050 can
provide as it attempts to drive the Drain to Source voltage
down to the V
charge will require some finite amount of additional discharge
time when the MOSFET needs to be turned off.
As a guideline, it is suggest that RDS(ON) be selected to pro-
vide at least 22 mV, and no more than 100 mV, at the nominal
load current.
The thermal resistance of the MOSFET package should also
be considered against the anticipated dissipation in the MOS-
FET in order to ensure that the junction temperature (T
DS(MAX)
DS(ON)
may not always give desirable results for several rea-
, the gate-to-source threshold voltage V
GS(TH)
(22 mV / I
GS(TH)
Gate Charge Time = Q
SD(REG)
at 2.5V, can also be used. Standard level
DS(ON)
DS(ON)
.
S
D
of 22 mV typical. This increased Gate
, the maximum drain-to-source voltage
)
. However, contrary to popular belief,
DS(ON)
≤
rated at V
R
DS(ON)
DS(ON)
DS(ON)
DS(ON)
rated at V
DS(ON)
DS(ON)
of the MOSFET. This con-
rating goes lower, the cost
≤
GS(TH)
g
will reduce this reverse
(100mV / I
/ I
that is too large will re-
.
GATE(ON)
GS(TH)
at 10V, are not rec-
D
S
DS(ON)
GS(TH)
DS(MAX)
, is typically rated
, rating must ex-
(BR)DSS
at 5V, are rec-
D
, should be
)
www.national.com
will provide
GS(TH)
, must be
, and the
(BR)DSS
DS(ON)
, the
J
) is
,