LFE2M70E-6FN900C Lattice, LFE2M70E-6FN900C Datasheet - Page 104
LFE2M70E-6FN900C
Manufacturer Part Number
LFE2M70E-6FN900C
Description
IC, LATTICEECP2M FPGA, 420MHZ, FPBGA-900
Manufacturer
Lattice
Series
LatticeECP2Mr
Datasheet
1.LFE2-12E-5FN256C.pdf
(385 pages)
Specifications of LFE2M70E-6FN900C
No. Of Logic Blocks
67000
No. Of Macrocells
34000
No. Of Speed Grades
6
Total Ram Bits
4534Kbit
No. Of I/o's
416
Clock Management
DLL, PLL
I/o Supply Voltage
3.465V
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2M70E-6FN900C
Manufacturer:
LATTICE
Quantity:
47
Company:
Part Number:
LFE2M70E-6FN900C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
PICs and DDR Data (DQ) Pins Associated with the DDR Strobe (DQS) Pin
For Left and Right Edges of the Device
P[Edge] [n-4]
P[Edge] [n-3]
P[Edge] [n-2]
P[Edge] [n-1]
P[Edge] [n]
P[Edge] [n+1]
P[Edge] [n+2]
P[Edge] [n+3]
For Bottom Edge of the Device
P[Edge] [n-4]
P[Edge] [n-3]
P[Edge] [n-2]
P[Edge] [n-1]
P[Edge] [n]
P[Edge] [n+1]
P[Edge] [n+2]
P[Edge] [n+3]
P[Edge] [n+4]
Notes:
1. “n” is a row PIC number.
2. The DDR interface is designed for memories that support one DQS strobe up to 15 bits
PICs Associated with
of data for the left and right edges and up to 17 bits of data for the bottom edge. In some
packages, all the potential DDR data (DQ) pins may not be available. PIC numbering
definitions are provided in the “Signal Names” column of the Signal Descriptions table.
DQS Strobe
PIO Within PIC
4-4
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
DDR Strobe (DQS) and
LatticeECP2/M Family Data Sheet
Data (DQ) Pins
[Edge]DQSn
[Edge]DQSn
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
Pinout Information
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