CLC014AJE National Semiconductor, CLC014AJE Datasheet - Page 4
![07B4822](/photos/31/33/313311/14pin_soic_n_sml.jpg)
CLC014AJE
Manufacturer Part Number
CLC014AJE
Description
07B4822
Manufacturer
National Semiconductor
Specifications of CLC014AJE
Ic Function
Adaptive Cable Equalizer
Supply Voltage Range
4.5V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
SOIC
No. Of Pins
14
Termination Type
SMD
Rohs Compliant
No
Filter Terminals
SMD
Data Rate Max
650Mbps
Lead Free Status / Rohs Status
Not Compliant
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AEC+/AEC− common mode
output eye monitor (OEM) bias potential
carrier detect (CD) current output-HIGH
carrier detect (CD) current output-LOW
MUTE voltage input-HIGH
MUTE voltage input-LOW
MUTE current input-HIGH
MUTE current input-LOW
TIMING PERFORMANCE
CD Response Time
MUTE response time
MISCELLANEOUS PERFORMANCE
input resistance
input capacitance
input return loss
maximum cable attenuation
Electrical Characteristics
(V
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined
from tested parameters.
Note 3: J-level: spec. is 100% tested at +25˚C.
Note 4: These specifications assume an 800 mV
will attenuate the signal prior to entering the equalizer.
Note 5: Peak-to-peak jitter is defined as 6 times the rms jitter.
Note 6: For more information, see “CLC014 Operation” and “Design Guidelines”.
Note 7: 50% eye opening.
Note 8: Time from application of a valid signal to when the CD output asserts high.
Note 9: Time from the removal of a valid signal to when the CD output asserts low.
Note 10: Time from assertion of MUTE to when the output responds.
Note 11: Device only. Does not include typical pc board parasitics.
Note 12: Includes typical pc board parasitics.
Note 13: This sets the maximum cable length for the equalizer.
Note 14: Human body model, 1.5 kΩ in series with 100 pF; based on limited test data.
Note 15: To maintain specified performance, do not reduce DO/DO below this level.
carrier applied
carrier removed
CC
= +5V, V
EE
Parameter
@
= 0V, signal source swing = 0.8 V
270 MHz
pp
signal at the cable input. Levels above and below 800 mV are allowable, but performance may vary. The cable
(Continued)
CD V
CD V
(Note 3)
(Note 3)
V
V
(Note 8)
(Note 9)
(Note 10)
single-ended
single-ended (Note 11)
Z
200 MHz (Note 13)
IH
IL
o
= 75Ω (Note 12)
= 0V (Note 3)
= 5V (Note 3)
OH
OL
pp
(Note 4), C
= 0.5V
= 4.5V
Conditions
4
AEC
= 100 pF)
+25˚C
−400
Typ
600
3.6
3.2
1.8
1.2
5.0
0.2
1.0
2.0
7.3
1.0
12
19
40
Min/Max
+25˚C
±
±
2.0
0.8
100
100
_
_
_
_
_
_
_
_
_
_
_
Min/Max
−40˚C to
+85˚C
±
±
2.0
0.8
500
500
_
_
_
_
_
_
_
_
_
_
_
Units
kΩ
µA
µA
nA
nA
pF
dB
dB
µs
µs
ns
V
V
V
V