LTC4251-2IS6#PBF Linear Technology, LTC4251-2IS6#PBF Datasheet - Page 9

• Manufacturer Part Number: LTC4251-2IS6#PBF
• Manufacturer: Linear Technology

Specifications of LTC4251-2IS6#PBF

• Family Name: LTC4251-2
• Package Type: TSOT-23
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Height (mm): 0.9mm
• Product Length (mm): 2.9mm
• Mounting: Surface Mount
• Pin Count: 6
• Lead Free Status / Rohs Status: Compliant

OPERATIO
Interlock Conditions
A start-up sequence commences once five initial “inter-
lock” conditions are met:
1. The input voltage V
2. The voltage at UV/OV falls within the range of V
3. The (SENSE – V
4. The voltage on the timer capacitor (C
5. GATE is less than 0.5V (V
The first two conditions are continuously monitored and
the latter three are checked prior to initial timing or GATE
ramp-up. Upon exiting an OV condition, the TIMER pin
voltage requirement is inhibited. Details are described in
the Applications Information, Timing Waveforms section.
TIMER begins the start-up sequence by sourcing 5.8µA
into C
stops and TIMER discharges C
until the aforementioned conditions are once again met. If
C
T
V
(V
successfully charges to 4V, TIMER pulls low and GATE
OVLO
TMRL
–48RTN
T
–48RTN
BACKPLANE
. If V
–48V
–48V
Figure 1. Basic LTC4251 Hot Swap Topology
(UV > V
)
SHORT
Figure 2. –48V, 2.5A Hot Swap Controller
IN
LONG
LONG
or UV/OV falls out of range, the start-up cycle
32.4k
402k
1%
1%
PLUG-IN BOARD
R1
R2
UVHI
U
LTC4251
EE
) voltage is <50mV (V
, LTC4251-2)
IN
C1
10nF
exceeds 9.2V (V
+
C
1µF
IN
GATEL
C
C
150nF
LOAD
T
T
TIMER
to less than 1V, then waits
UV/OV
3
V
EE
1
+
–
20mΩ
CONVERTER
18nF
)
ISOLATED
C
MODULE
R
C
DC/DC
S
LTC4251
SENSE
V
2
IN
4
R
10k
500mW
10Ω
IN
–
R
+
T
C
IRF530S
) is less than 1V
GATE
LKO
Q1
LOW
VOLTAGE
CIRCUITRY
CB
)
+
)
425112 F01
425112 F02
C
100µF
TYP
L
UVHI
to
is released. GATE sources 58µA (I
MOSFET gate and associated capacitance.
Two modes of operation are possible during the time the
MOSFET is first turning on, depending on the values of
external components, MOSFET characteristics and nomi-
nal design current. One possibility is that the MOSFET will
turn on gradually so that the inrush into the load capaci-
tance remains a low value. The output will simply ramp to
–48V and the MOSFET will be fully enhanced. A second
possibility is that the load current exceeds the current limit
threshold of 100mV/R
LTC4251-1/LTC4251-2 will ramp the output by sourcing
100mV/R
tant to set the timer delay so that, regardless of which
start-up mode is used, the start-up time is less than the
TIMER delay time. If this condition is not met, the LTC4251/
LTC4251-1/LTC4251-2 may shut down after one TIMER
delay.
Board Removal
If the board is withdrawn from the card cage, the UV/OV
divider is the first to lose connection. This shuts off the
MOSFET and commutates the flow of current in the
connector. When the power pins subsequently separate,
there is no arcing.
Current Control
Three levels of protection handle short-circuit and over-
load conditions. Load current is monitored by SENSE and
resistor R
50mV for a timed circuit breaker function; 100mV for an
analog current limit loop; and 200mV for a fast, feedforward
comparator which limits peak current in the event of a
catastrophic short-circuit.
If, owing to an output overload, the voltage drop across R
exceeds 50mV, TIMER sources 230µA into C
ally charges to a 4V threshold and the LTC4251/LTC4251-1/
LTC4251-2 latch off. If the overload goes away and SENSE
measures less than 50mV, C
In this way the circuit breaker function will also respond to
low duty cycle overloads, and accounts for fast heating
and slow cooling characteristic of the MOSFET.
S
S
. There are three distinct thresholds at SENSE:
current into the load capacitance. It is impor-
LTC4251/LTC4251-1/
S
. In this case, the LTC4251/
T
slowly discharges (5.8µA).
LTC4251-2
GATE
), charging the
T
. C
T
eventu-
425112fa
9
S