DS92LV222ATM National Semiconductor, DS92LV222ATM Datasheet - Page 6

• Manufacturer Part Number: DS92LV222ATM
• Manufacturer: National Semiconductor

Specifications of DS92LV222ATM

• Number Of Elements: 2
• Number Of Receivers: 2
• Number Of Drivers: 2
• Input Type: CMOS
• Operating Supply Voltage (typ): 3.3V
• Differential Input High Threshold Voltage: 100mV
• Diff. Input Low Threshold Volt: -100mV
• Output Type: Repeater
• Differential Output Voltage: 280mV
• Transmission Data Rate: 800Mbps
• Propagation Delay Time: 13ns
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Power Dissipation: 970mW
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: SOIC N
• Lead Free Status / Rohs Status: Not Compliant

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Function Select Table
Truth Table for Receiver Zero
X = High or low logic state
Z = High impedance state
L = Low state
Truth Table for Current Drive
Applications Information
There are few common practices which should be employed
when designing PCB for Bus LVDS signaling. Recom-
mended practices are:
MEDIA (CABLE, CONNECTOR OR BACKPLANE)
SELECTION:
• Use at least 4 PCB board layer (Bus LVDS signals,
• Keep drivers and receivers as close to the (Bus LVDS
• Bypass each Bus LVDS device and also use distributed
• Use controlled impedance traces which match the differ-
• Use the termination resistor which best matches the dif-
• Leave unused Bus LVDS receiver inputs open (floating).
• Isolate TTL signals from Bus LVDS signals.
• Use controlled impedance media. The cables and con-
DE0
H
H
H
L
ground, power and TTL signals).
port side) connector as possible.
bulk capacitance. Surface mount capacitors placed close
to power and ground pins work best. Two or three multi-
layer ceramic (MLC) surface mount capacitors (0.1µ and
0.01 µF in parallel should be used between each V
ground. The capacitors should be as close as possible to
the V
ential impedance of your transmission medium (i.e.,
Cable) and termination resistor.
ferential impedance of your transmission line.
nectors should have a matched differential impedance.
RSEL
CC
L
L
L
X
pin.
Receiver Zero ON, Driver Zero ON, Driver One OFF
Receiver Zero ON, Driver Zero OFF, Driver One ON
Receiver One ON, Driver Zero ON, Driver One OFF
Receiver One ON, Driver Zero OFF, Driver One ON
Receiver Zero ON, Driver Zero ON, Driver One ON
Receiver One ON, Driver Zero ON, Driver One ON
Driver Zero and Driver One TRI-STATE
100 mV
INPUTS
(RI0+)–(RI0−)
>
&
Driver 0
Driver 0
Driver 1
Driver 1
H
X
L
Driver
>
−100 mV
MODE SELECTED
DO+
OUTPUTS
H
X
Z
L
Current Drive
CC
3.5 mA
8.5 mA
3.5 mA
8.5 mA
DO−
and
H
L
X
Z
6
Truth Table for Receiver One
X = High or low logic state
Z = High impedance state
L = Low state
• Balanced cables (e.g., twisted pair) are usually better
•
• There are different types of failsafe situations to consider,
DE1
H
H
H
L
than unbalanced cables (ribbon cable, simple coax) for
noise reduction and signal quality.
these are Open Input, Terminated Input, and other spe-
cial cases. The first, Open input failsafe occurs when only
one receiver is being used (R0 for example). The unused
receiver (R1) inputs should be left open for noise minimi-
zation. The second case is for terminated inputs. This oc-
curs when the inputs have a low impedance (typically 100
Ohm) termination (R
plugged. For this case, and if the output state needs to
maintain a known state, two external bias resistors may
be used to provide a strong common mode bias point.
For this a 10K Ohm pull up and pull down resistor may be
used to set the output high. Note that R
be much larger ( 2 orders of magnitude) compared to R
to minimize loading effects to the Bus LVDS driver when
it is active.
RSEL
ISEL0
H
H
H
X
H
L
X
X
100 mV
INPUTS
ISEL1
(RI1+)–(RI1−)
DE0
T
X
X
H
L
) across them, and the cable is un-
H
H
H
H
L
L
L
>
&
H
X
L
>
DE1 RSEL
H
H
H
H
L
L
L
−100 mV
L
L
H
H
L
H
X
1
and R
DO+
OUTPUTS
H
X
L
Z
2
should
DO−
H
X
Z
L
T