MC145572EI Freescale Semiconductor, MC145572EI Datasheet - Page 183
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MC145572EI
Manufacturer Part Number
MC145572EI
Description
Manufacturer
Freescale Semiconductor
Datasheet
1.MC145572EI.pdf
(264 pages)
Specifications of MC145572EI
Number Of Line Interfaces
1
Control Interface
HDLC
Package Type
PLCC
Lead Free Status / Rohs Status
Compliant
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10.10.2
MOTOROLA
SFAX Input Timing in IDL2 (Master or Slave) Long Frame Mode
NOTES:
Ref. No.
1. See Section 10.7 for FSX jitter requirements and specifications.
2. SFAX must occur every 96 FSX 8 kHz frames.
3. SFAX is sampled on the rising edge of FSX.
100
101
95
96
97
98
99
Delay From Rising Edge of DCL to Rising Edge of FSR or FSX
FSR or FSX High Before the Falling Edge of DCL (FSR or FSX
Setup Time)
FSR or FSX High After the Falling Edge of DCL (FSR or FSX
Hold Time)
FSX Period
SFAX Period
SFAX Input High Before Rising Edge of FSX (SFAX Setup
Time)
SFAX Input High After Rising Edge of FSX (SFAX Hold Time)
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Parameter
MC145572
12.0
Min
125
—
25
25
25
25
Max
30
—
—
—
—
—
—
Unit
ms
ns
ns
ns
ns
ns
s
10–21
Note
1
2
3
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