PSB21150FV14XP Lantiq, PSB21150FV14XP Datasheet - Page 108
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PSB21150FV14XP
Manufacturer Part Number
PSB21150FV14XP
Description
Manufacturer
Lantiq
Datasheet
1.PSB21150FV14XP.pdf
(270 pages)
Specifications of PSB21150FV14XP
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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Restrictions Concerning Monitoring and Shifting Data
Due to the hardware design, there are some restrictions for the CDA shifting data
function and for the CDA monitoring data function. The selection of the CDA registers is
restricted if other functional blocks of the IPAC-X (transceiver cores, HDLC controllers,
CI handler, Monitor handler, TIC bus etc.) access the corresponding timeslot.
If no functional block is assigned to a certain timeslot, any CDA register can be used for
monitoring or shifting it.
If a timeslot is already occupied by a functional block in a certain transmission direction,
only CDA registers with odd numbers (CDA11/21) can be assigned to odd timeslots and
CDA registers with even numbers (CDA10/20) can be assigned to even timeslots in the
same transmission direction. For the other transmission direction every CDA register can
be used. (Example: If TS 5 is already occupied in DD direction, only CDA11 and 21 can
be used for monitoring it. For monitoring TS 5 in DU direction, also CDA10 or CDA20
could be used.)
If above guideline is not considered, data can be overwritten in corresponding timeslots.
In this context no general rules can be derived in which way the data are overwritten.
The usage of the looping data and switching data functions are unrestricted.
Restrictions Concerning Read/Write Access
If data shall be read out from a certain transmission direction and other data shall be
written in the opposite transmission direction in the same timeslot, only special CDA
register combinations can be used. The correct behavior can be achieved with the
following CDA register combinations:
Table 11
CDA Register Combination
Data of the downstream timeslot is read by CDA10
Data is written to the upstream timeslot from CDA20
With other register combinations unintended loops or erroneous monitorings can occur
or wrong data is written to the IOM interface.
Unexpected Write/Read Behavior of CDA Registers
If inputs and outputs are disabled, the programmed values of CDA10/11/20/21 registers
cannot be read back. Instead of the expected value the content of the previous
programming can be read out. The programmed value (5A
will be fetched if the output is enabled.
Data Sheet
CDA Register Combinations with Correct Read/Write Access
108
1
Description of Functional Blocks
CDA11
CDA21
2
H
in the following example)
3
CDA20
CDA10
PSB/PSF 21150
2003-01-30
4
CDA21
CDA11
IPAC-X
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