PEB3081FV14XT Lantiq, PEB3081FV14XT Datasheet - Page 64
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PEB3081FV14XT
Manufacturer Part Number
PEB3081FV14XT
Description
Manufacturer
Lantiq
Datasheet
1.PEB3081FV14XT.pdf
(198 pages)
Specifications of PEB3081FV14XT
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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Preliminary
Figure 34
3.5.1.2
F3 Pending Deactivation
State after deactivation from the S/T interface by INFO 0. Note that no activation from
the terminal side is possible starting from this state. A ’DI’ command has to be issued to
enter the state ’Deactivated State’.
F3 Deactivated State
The S/T interface is deactivated and the clocks are deactivated 500 µs after entering this
state and receiving INFO 0 if the CFS bit of the SBCX-X Configuration Register is set to
“0“. Activation is possible from the S/T interface and from the IOM-2 interface. The bit
TR_CMD.PD is set and the analog part is powered down.
F3 Power Up
The S/T interface is deactivated (INFO 0 on the line) and the clocks are running.
F4 Pending Activation
The SBCX-X transmits INFO 1 towards the network, waiting for INFO 2.
Data Sheet
TIM
DI
States (TE, LT-T)
Test Mode i
TMA
State Transition Diagram of Unconditional Transitions (TE, LT-T)
it
i
SCP
SSP
SCP
SSP
*
TIM
DI
TIM
DI
Loop A Activated
Loop A Closed
RSY
ARL ARL
AIL
i3
i3
ARL
i3
64
ARL
*
*
i3
Description of Functional Blocks
TIM
DI
RES RES
i0
Reset
State
Any
RES
*
PEB 3081
PEF 3081
RST
2000-09-27
statem_te_aloop_s.vsd
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