UC2845D ON Semiconductor, UC2845D Datasheet - Page 11

Other Power Management 52kHz 1A Current PWM

UC2845D

Manufacturer Part Number
UC2845D
Description
Other Power Management 52kHz 1A Current PWM
Manufacturer
ON Semiconductor
Type
High Performance Current Mode Controllersr
Datasheet

Specifications of UC2845D

Output Voltage Range
4.95 V to 5.05 V
Input Voltage Range
30 V
Operating Temperature Range
- 25 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-14
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Series gate resistor R
caused by the MOSFET input capacitance and any series wiring inductance
in the gate−source circuit.
+
Figure 25. MOSFET Parasitic Oscillations
5.0V
+
+
Error Amp compensation circuit for stabilizing any current−mode topology except
for boost and flyback converters operating with continuous inductor current.
ref
Comp/Latch
Figure 27. Isolated MOSFET Drive
+
5.0V
S
R
T
Q
R
R
From V
R
+
d
f
+
i
ref
≥ 8.8 k
Comp/Latch
+
g
C
O
will damp any high frequency parasitic oscillations
I
S
R
T
+
Q
7(12)
+
R
2(3)
1(1)
f
V
7(11)
6(10)
5(8)
3(5)
+
CC
7(12)
2.5V
C
+
Boundary
V
Isolation
EA
CC
7(11)
6(10)
5(8)
3(5)
R
R
+
S
1.0mA
R
Figure 29. Error Amplifier Compensation
g
N
2R
S
R
Q1
Q1
R
V
5(9)
S
in
N
V
+
0
p
I
É É
É É É
pk
in
50% DC
http://onsemi.com
=
V
V
(pin 1)
GS
3 R
Waveforms
− 1.4
S
+
0
11
É
É É É
25% DC
N
N
P
S
The MCR101 SCR must be selected for a holding of less than 0.5 mA at T
The simple two transistor circuit can be used in place of the SCR as shown. All
resistors are 10 k.
Error Amp compensation circuit for stabilizing current−mode boost and flyback
topologies operating with continuous inductor current.
The totem−pole output can furnish negative base current for enhanced
transistor turn−off, with the addition of capacitor C
MCR
101
C
R
p
Figure 26. Bipolar Transistor Drive
From V
p
Figure 28. Latched Shutdown
+
0
R
O
R
i
I
3905
B
d
2N
C
I
6(1)
5(8)
3(5)
3903
R
2N
2(3)
1(1)
Removal
f
Charge
8(14)
Base
4(7)
2(3)
1(1)
2.5V
C
1
+
+
EA
1
.
EA
R
R
+
Q1
+
R
V
1.0mA
S
in
OSC
1.0mA
Bias
2R
2R
R
R
A(min)
5(9)
5(9)
.

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