MAX1587AETL-T Maxim Integrated Products, MAX1587AETL-T Datasheet - Page 14

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MAX1587AETL-T

Manufacturer Part Number
MAX1587AETL-T
Description
Other Power Management PMICs w/Dynamic Core for PDAs
Manufacturer
Maxim Integrated Products
Datasheet
High-Efficiency, Low-I
Dynamic Core for PDAs and Smart Phones
Dual Mode is a trademark of Maxim Integrated Products, Inc.
14
1586
MAX
10
11
12
13
14
15
1
2
3
4
5
6
7
8
9
______________________________________________________________________________________
PIN
1587
MAX
40
10
11
12
1
2
3
4
5
6
7
8
9
NAME
PWM3
SLPIN Inp ut to V 1 and V 2 S l eep Reg ul ator s. The i np ut to the stand b y r eg ul ator s at V 1 and V 2. C onnect S LP IN to IN .
BKBT
CC1
CC2
SDA
LBO
FB1
FB2
POK
SCL
LBI
V7
V1
V2
Dual Mode™, Low-Battery Input. Connect to IN to set the low-battery threshold to 3.6V (no resistors
needed). Connect LBI to a resistor-divider for an adjustable LBI threshold. When V
threshold, LBO output switches low. LBO is deactivated and forced low when V
(DBI) threshold and when all REGs are disabled.
REG1 Compensation Node. Connect a series resistor and capacitor from CC1 to GND to compensate the
regulation loop. See the Compensation and Stability section.
REG1 Feedback Input. Connect FB1 to GND to set V1 to 3.3V. Connect FB1 to external feedback resistors
for other output voltages.
Input Connection for Backup Battery. This input can also accept the output of an external boost converter.
Also known as VCC_BATT. V7 is always active if main or backup power is present. It is the first regulator
that powers up. V7 has two states:
REG1 Voltage-Sense Input. Connect directly to the REG1 output voltage. The output voltage is set by FB1
to either 3.3V or adjustable with resistors.
REG2 Voltage-Sense Input. Connect directly to the REG2 output voltage. The output voltage is set by FB2
to either 1.8V/2.5V (MAX1586A, MAX1587A), 3.3V/2.5V (MAX1586B), or adjustable with resistors.
REG2 Feedback Input. Connect to GND to set V2 to 2.5V on all devices. Connect FB2 to IN to set V2 to
1.8V on the MAX1586A and MAX1587A. Connect FB2 to IN to set V2 to 3.3V on the MAX1586B. Connect
FB2 to external feedback resistors for other voltages.
REG2 Compensation Node. Connect a series resistor and capacitor from CC2 to GND to compensate the
regulation loop. See the Compensation and Stability section.
Power-OK Output. Open-drain output that is low when any of the V1–V6 outputs are below their regulation
threshold. When all activated outputs are in regulation, POK is high impedance. POK maintains a valid low
output with V7 as low as 1V. POK does not flag an out-of-regulation condition while REG3 is transitioning
between voltages set by serial programming. POK also does not flag for any REG channel that has been
turned off; however, if all REG channels are off (V1–V6), then POK is forced low. If V
low. POK is expected to connect to nVCC_FAULT.
Serial Clock Input
Serial Data Input. Data is read on the rising edge of SCL. Serial data programs the REG3 (core) and REG6
(VCC_USIM) voltage. REG3 and REG6 can be programmed even when off, but at least one of the ON_ pins
must be logic-high to activate the serial interface. On power-up, REG3 defaults to 1.3V and REG6 defaults
to 0V.
Force V3 to PWM at All Loads. Connect PWM3 to GND for normal operation (skip mode at light loads). Drive
or connect high for forced-PWM operation at all loads for V3 only.
Low-Battery Output. Open-drain output that goes low when V
1) V7 tracks V1 if ON1 is high and V1 is in regulation.
2) V7 tracks V
BKBT
when ON1 is low or V1 is out of regulation.
Q
PMICs with
FUNCTION
IN
is below the threshold set by LBI.
IN
Pin Description
is below the dead-battery
IN
IN
is below the set
< V
UVLO
, then POK is

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