MAX34561T+T Maxim Integrated Products, MAX34561T+T Datasheet - Page 9

• Manufacturer Part Number: MAX34561T+T
• Description: Other Power Management 12V/5V Hot-Plug Switch
• Manufacturer: Maxim Integrated Products

Specifications of MAX34561T+T

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Once the device has been enabled, there is a delay
(t
LOAD12 (LOAD5). This delay is the time required for
the charge pump to bring the gate voltage of the cor-
responding power MOSFET above its threshold level.
Once the gate is above the threshold level, conduction
begins and the output voltage begins ramping.
When V
holding the TIMER12 (TIMER5) node low is released. The
internal current source brings the node to a level greater
than V
When V
holding the TIMER12 (TIMER5) node low is released. The
internal current source (I
C
than V
for the delay time is:
A logic gate or open-collector device can be connected
to TIMER12 (TIMER5) to enable or disable the device.
When TIMER12 (TIMER5) is held low, the device is dis-
abled. When an open-collector device is used to drive
TIMER12 (TIMER5), the device is enabled when the open
collector is in its high-impedance state by the internal
current source bringing the TIMER12 (TIMER5) node
high. TIMER12 (TIMER5) is also compatible with most
logic families if the output high voltage level of the gate
exceeds the V
current.
An open-collector device is connected in parallel with
C
abled. When the open-collector driver is high imped-
ance, the internal current source begins to charge
C
The voltage ramp circuit uses an operational ampli-
fier to control the gate bias of the corresponding
n-channel power MOSFET. When the timer/enable
circuit is disabled, a FET is used to keep C
discharged, which forces the output voltage to GND.
Once the enable/timer circuit has been enabled, an
POND
TIMER_
TIMER_
TIMER_
ON
REF12
) until conduction begins from V
CC12
CC12
. When C
. When the pin is held low, the device is dis-
t
as in the delayed mode.
, enabling the device.
DELAY
t
DELAY
(V
(V
(V
ON
Delayed Automatic-Enable Mode
REF5
Enable with Delay/Disable Mode
CC5
CC5
= (C
= (C
level, and the gate can sink the I
TIMER_
), the device turns on. The equation
) exceeds V
) exceeds V
TIMER12
Output-Voltage Ramp
TIMER5
Automatic-Enable Mode
TIMER
is charged to a level greater
Enable/Disable Mode
x V
x V
) then begins charging
UR12
UR12
REF12
REF5
)/I
(V
(V
)/I
TIMER
CC12
TIMER
UR5
UR5
), the gate
), the gate
(V
VRAMP_
CC5
TIMER
) to
12V/5V Hot-Plug Switch
internal current source, I
external capacitor, C
(VRAMP5). The amplifier controls the gate of the corre-
sponding power MOSFET so that the LOAD12 (LOAD5)
output voltage divided by two tracks the rising voltage
level of C
until it reaches either the input V
or the overvoltage clamp limits. The equation for the
output-voltage ramp function is:
The device enters a thermal shutdown state when
the temperature of the corresponding power MOSFET
reaches or exceeds T
When T
cuitry disables the device using the enable circuitry.
Depending on the state of ARD12 (ARD5), the device
attempts to autoretry once the device has cooled, or it
latches off.
If ARD12 (ARD5) is unconnected or connected high, the
device continually monitors the temperature once it has
entered thermal shutdown. If the junction temperature
falls below approximately +95NC (T
corresponding power MOSFET is re-enabled. See the
Thermal Shutdown with Autoretry Enabled typical operat-
ing curves for details.
If ARD12 (ARD5) is pulled low and the device has
entered thermal shutdown, it does not attempt to turn
back on. The only way to turn the device back on is to
cycle the power to the device. When power is reapplied
to V
less than T
The overvoltage-limiting clamp monitors the VRAMP12
(VRAMP5) level compared to an internal voltage ref-
erence. When the voltage on VRAMP12 (VRAMP5)
exceeds V
age of the corresponding n-channel power MOSFET is
reduced, limiting the voltage on LOAD12 (LOAD5) to
V
device is in overvoltage for an extended period of time,
the device could overheat and enter thermal shutdown.
This is caused by the power created by the voltage
dV
dV
OVC12
LOAD
CC12
LOAD
/dt = 2.3332 x (I
(V
SHDN
VRAMP_
/dt = 2 x (I
(V
OVC5
SHDN
OVC12
CC5
is exceeded, the thermal-limiting cir-
) even as V
), the junction temperature needs to be
for the device to be enabled.
. The output voltage continues to ramp
/2 (or V
VRAMP
VRAMP_
VRAMP
SHDN
VRAMP
Thermal Shutdown
OVC5
Overvoltage Limit
/C
CC12
VRAMP12
, connected to VRAMP12
, approximately +135NC.
/C
/2.3332), the gate volt-
, begins to charge the
(V
VRAMP5
CC5
CC12
SHDN
) for +12V circuit
) increases. If the
) for +5V circuit
(V
- T
Autoretry
CC5
Latchoff
HYS
) level
), the
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