SIP41103DM-T1 Vishay, SIP41103DM-T1 Datasheet - Page 5

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SIP41103DM-T1

Manufacturer Part Number
SIP41103DM-T1
Description
MOSFET & Power Driver ICs H-Bridge N-Ch MOSFET
Manufacturer
Vishay
Type
High Side/Low Sider
Datasheet

Specifications of SIP41103DM-T1

Rise Time
55 ns
Fall Time
45 ns
Supply Voltage (min)
4.5 V
Supply Current
3 mA
Maximum Power Dissipation
960 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Bridge Type
Half Bridge
Minimum Operating Temperature
- 40 C
Number Of Drivers
2
Number Of Outputs
2
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
FUNCTIONAL BLOCK DIAGRAM
DETAILED OPERATION
PWM
The PWM pin controls the switching of the external
MOSFETs. The driver logic operates in a noninverting
configuration. The PWM input stage should be driven
by a signal with fast transition times, like those pro-
vided by a PWM controller or logic gate, (< 200 ns).
The PWM input functions as a logic input and is not
intended for applications where a slow changing input
voltage is used to generate a switching output when
the input switching threshold voltage is reached.
Enable
The device is enabled by edge sensing of transitions
on PWM, high or low. A minimum PWM frequency of
2 kHz is required to keep the device enabled. When
continuous PWM transitions are present, and after
power-on reset time has elapsed, OUT
become active.
Low-Side Driver
The supplies for the low-side driver are V
During shutdown, OUT
High-Side Driver
The high-side driver is isolated from the substrate to
create a floating high-side driver so that an N-Channel
MOSFET can be used for the high-side switch. The
supplies for the high-side driver are BOOT and LX.
The voltage is supplied by a floating bootstrap capaci-
Document Number: 72718
S-61692–Rev. E, 04-Sep-06
EN
DELAY
GND
PWM
SYNC
V
DD
L
is held low.
UVLO
OTP
H
and OUT
DD
and GND.
L
will
Figure 1.
tor, which is continually recharged by the switching
action of the output. During shutdown OUT
low.
Bootstrap Circuit
The internal bootstrap diode and a bootstrap capacitor
form a charge pump that supplies voltage to the BOOT
pin. An integrated bootstrap diode replaces the exter-
nal Schottky diode and bootstrap only a capacitor is
necessary to complete the circuit. The bootstrap
capacitor is sized according to.
where Q
high-side MOSFET and
droop allowed in the bootstrap supply voltage when
the high-side MOSFET is driven high. The bootstrap
capacitor value is typically 0.1 µF to 1 µF. The boot-
strap capacitor voltage rating must be greater than
V
Shoot-Through Protection
The external MOSFETs are prevented from conduct-
ing at the same time during transitions. Break-before-
make circuits monitor the voltages on the LX pin and
the OUT
When the signal on PWM goes low, OUT
after an internal propagation delay. After the voltage
DD
DELAY
+ 5 V to withstand transient spikes and ringing.
GATE
L
pin and control the switching as follows:
is the gate charge needed to turn on the
C
BOOT
+
V
V
= (Q
DD
BBM
Gate
Δ
V
BOOT-LX
V BOOT- LX
Vishay Siliconix
BOOT
OUT
OUT
LX
is the amount of
SiP41103
H
L
) x 10
www.vishay.com
H
will go low
H
is held
5

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