KSZ8721BL Micrel Inc, KSZ8721BL Datasheet - Page 18

• Manufacturer Part Number: KSZ8721BL
• Description: IC TXRX PHY 10/100 3.3V 48-LQFP
• Manufacturer: Micrel Inc
• Type: Transceiverr

Specifications of KSZ8721BL

• Number Of Drivers/receivers: 1/1
• Protocol: MII, RMII
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Data Rate: 100Mbps
• No. Of Ports: 1
• Ethernet Type: IEEE 802.3u
• Supply Current: 151mA
• Supply Voltage Range: 3.3V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 48
• Interface Type: MII, RMII
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1627 - BOARD EVALUATION FOR KSZ8721BMC576-1626 - BOARD EVALUATION FOR KSZ8721BL
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1028-5; 576-1511-5; 576-1511-5; KSZ8721BL

KS8721BL/SL
Register Map
Note:
1. RW: Read/Write, RO: Read Only, SC: Self Clear, LH: Latch High, LL: Latch Low. Some of the default values are set by strap-in. See “Strapping
M9999-051704
Address
Register 0h - Basic Control
0.15
0.14
0.13
0.12
0.11
0.10
0.9
0.8
0.7
0.6:1
0.0
Register 1h - Basic Status
1.15
1.14
1.13
1.12
1.11
Options.”
Register No.
15h
1bh
1fh
0h
1h
2h
3h
4h
5h
6h
7h
8h
Reset
Loop-Back
Speed Select (LSB)
Auto-Negotiation Enable
Power Down
Isolate
Restart Auto-Negotiation
Duplex Mode
Collision Test
Disable
Transmitter
100BASE-T4
100BASE-TX Full-Duplex
100BASE-TX Half-Duplex 1 = capable of 100BASE-X half-duplex.
10BASE-T Full-Duplex
10BASE-T Half-Duplex
Reserved
Name
Description
Basic Control Register
Basic Status Register
PHY Identifier I
PHY Identifier II
Auto-Negotiation Advertisement Register
Auto-Negotiation Link Partner Ability Register
Auto-Negotiation Expansion Register
Auto-Negotiation Next Page Register
Link Partner Next Page Ability
RXER Counter Register
Interrupt Control/Status Register
100BASE-TX PHY Control Register
1 = loop-back mode; 0 = normal operation.
Description
1 = software reset. Bit is self-clearing.
1 = 100Mbps; 0 = 10Mbps.
Ignored if Auto-Negotiation is enabled (0.12 = 1).
1 = enable auto-negotiation process (override 0.13 and 0.8).
0 = disable auto-negotiation process.
1 = power-down mode; 0 = normal operation.
1 = electrical isolation of PHY from MII and TX+/TX-.
0 = normal operation.
1 = restart auto-negotiation process.
0 = normal operation. Bit is self-clearing.
1 = full-duplex; 0 = half-duplex.
1 = enable COL test; 0 = disable COL test.
0 = enable transmitter.
1 = disable transmitter.
1 = T4 capable; 0 = not T4 capable.
1 = capable of 100BASE-X full-duplex.
0 = not capable of 100BASE-X full-duplex.
0 = not capable of 100BASE-X half-duplex.
1 = 10Mbps with full-duplex.
0 = no 10Mbps with full-duplex capability.
1 = 10Mbps with half-duplex.
0 = no 10Mbps with half-duplex capability.
18
RW/SC
Mode
RW/SC
RW
RW
RW
RW
RW
RW
RW
RO
R/W
RO
RO
RO
RO
RO
(1)
Default
0
0
Set by
SPD100
Set by
NWAYEN
0
Set by ISO
0
Set by
DUPLEX
0
0
0
0
1
1
1
1
May 2004
Micrel