PIC18F43K22T-I/ML Microchip Technology Inc., PIC18F43K22T-I/ML Datasheet - Page 397

• Manufacturer Part Number: PIC18F43K22T-I/ML
• Description: 8KB, FLASH, 3968BYTES-RAM, 8-BIT FAMILY, NANOWATT XLP, 44 QFN 8X8X0.9MM T/R
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F43K22T-I/ML

• A/d Inputs: 28-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 35
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin QFN
• Programmable Memory: 8K Bytes
• Ram Size: 512 Bytes
• Speed: 48 MHz
• Temperature Range: –40 to 125 °C
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

RCALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2010 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
operation
Decode
PC =
PC =
TOS =
Q1
No
PUSH PC to
Address (HERE)
Address (Jump)
Address (HERE + 2)
Read literal
operation
Relative Call
RCALL
-1024  n  1023
(PC) + 2  TOS,
(PC) + 2 + 2n  PC
None
Subroutine call with a jump up to 1K
from the current location. First, return
address (PC + 2) is pushed onto the
stack. Then, add the 2’s complement
number ‘2n’ to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is a
two-cycle instruction.
1
2
HERE
stack
1101
Q2
No
‘n’
n
RCALL Jump
1nnn
operation
Process
Data
Q3
No
nnnn
Write to PC
operation
Q4
No
nnnn
Preliminary
RESET
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
PIC18(L)F2X/4XK22
After Instruction
Decode
Registers =
Flags*
Q1
=
Reset
RESET
None
Reset all registers and flags that are
affected by a MCLR Reset.
All
This instruction provides a way to
execute a MCLR Reset by software.
1
1
RESET
Reset
Start
0000
Q2
Reset Value
Reset Value
0000
operation
Q3
No
DS41412D-page 397
1111
operation
Q4
No
1111