PIC16LF1827-E/SO Microchip Technology Inc., PIC16LF1827-E/SO Datasheet - Page 119

• Manufacturer Part Number: PIC16LF1827-E/SO
• Description: 18 PIN, 7 KB FLASH, 384 BYTES RAM, 32 MHZ INT. OSC, 16 I/0, ENHANCED MID RANGE C
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16LF1827-E/SO

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 16
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin SOIC
• Programmable Memory: 7K Bytes
• Ram Size: 384 Bytes
• Speed: 32 MHz
• Temperature Range: –40 to 125 °C
• Timers: 4-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

REGISTER 12-1:
REGISTER 12-2:
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-1
bit 0
RXDTSEL
R/W-0/0
U-0
—
PIC16(L)F1827 only.
RXDTSEL: Pin Selection bit
0 = RX/DT function is on RB1
1 = RX/DT function is on RB2
SDO1SEL: Pin Selection bit
0 = SDO1 function is on RB2
1 = SDO1 function is on RA6
SS1SEL: Pin Selection bit
0 = SS1 function is on RB5
1 = SS1 function is on RA5
P2BSEL: Pin Selection bit
0 = P2B function is on RB7
1 = P2B function is on RA6
CCP2SEL: Pin Selection bit
0 = CCP2/P2A function is on RB6
1 = CCP2/P2A function is on RA7
P1DSEL: Pin Selection bit
0 = P1D function is on RB7
1 = P1D function is on RA6
P1CSEL: Pin Selection bit
0 = P1C function is on RB6
1 = P1C function is on RA7
CCP1SEL: Pin Selection bit
0 = CCP1/P1A function is on RB3
1 = CCP1/P1A function is on RB0
Unimplemented: Read as ‘0’
TXCKSEL: Pin Selection bit
0 = TX/CK function is on RB2
1 = TX/CK function is on RB5
SDO1SEL
R/W-0/0
U-0
—
APFCON0: ALTERNATE PIN FUNCTION CONTROL REGISTER 0
APFCON1: ALTERNATE PIN FUNCTION CONTROL REGISTER 1
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
SS1SEL
R/W-0/0
U-0
—
P2BSEL
R/W-0/0
U-0
—
(1)
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
CCP2SEL
R/W-0/0
U-0
—
(1)
PIC16(L)F1826/27
P1DSEL
R/W-0/0
U-0
—
P1CSEL
R/W-0/0
U-0
—
DS41391D-page 119
TXCKSEL
CCP1SEL
R/W-0/0
R/W-0/0
bit 0
bit 0