PIC16F882-I/SO Microchip Technology Inc., PIC16F882-I/SO Datasheet - Page 130
PIC16F882-I/SO
Manufacturer Part Number
PIC16F882-I/SO
Description
28 PIN, 3.5KB ENH FLASH, 128 RAM, 25 I/O, PB FREE
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F882-ISO.pdf
(328 pages)
Specifications of PIC16F882-I/SO
A/d Inputs
11-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
128 Bytes
Frequency
20 MHz
Input Output
24
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SOIC
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Resistance, Drain To Source On
Bytes
Serial Interface
EUSART/MSSP
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F882-I/SO
Manufacturer:
Kingbright
Quantity:
21 000
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PIC16F882/883/884/886/887
11.5
The PWM mode generates a Pulse-Width Modulated
signal on the CCPx pin. The duty cycle, period and
resolution are determined by the following registers:
• PR2
• T2CON
• CCPRxL
• CCPxCON
In Pulse-Width Modulation (PWM) mode, the CCP
module produces up to a 10-bit resolution PWM output
on the CCPx pin. Since the CCPx pin is multiplexed
with the PORT data latch, the TRIS for that pin must be
cleared to enable the CCPx pin output driver.
Figure 11-3 shows a simplified block diagram of PWM
operation.
Figure 11-4 shows a typical waveform of the PWM
signal.
For a step-by-step procedure on how to set up the CCP
module for PWM operation, see Section 11.5.7
“Setup for PWM Operation”.
FIGURE 11-3:
DS41291E-page 128
Note 1:
Note:
CCPRxH
Duty Cycle Registers
Comparator
2:
CCPRxL
PWM Mode
PR2
TMR2
Comparator
Clearing the CCPxCON register will
relinquish CCPx control of the CCPx pin.
The 8-bit timer TMR2 register is concatenated
with the 2-bit internal system clock (F
2 bits of the prescaler, to create the 10-bit time
base.
In PWM mode, CCPRxH is a read-only register.
(2)
(Slave)
(1)
SIMPLIFIED PWM BLOCK
DIAGRAM
Clear Timer2,
toggle CCPx pin and
latch duty cycle
CCPxCON<5:4>
S
R
Q
TRIS
OSC
CCPx
), or
The PWM output (Figure 11-4) has a time base
(period) and a time that the output stays high (duty
cycle).
FIGURE 11-4:
Pulse Width
TMR2 = 0
Period
CCP PWM OUTPUT
TMR2 = CCPRxL:CCPxCON<5:4>
© 2008 Microchip Technology Inc.
TMR2 = PR2
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