PIC18F45K22-I/PT Microchip Technology Inc., PIC18F45K22-I/PT Datasheet - Page 408
PIC18F45K22-I/PT
Manufacturer Part Number
PIC18F45K22-I/PT
Description
44 TQFP 10x10x1mm TRAY, 32KB, Flash, 1536bytes-RAM, 8-bit Family, nanoWatt XLP
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F45K22-IP.pdf
(496 pages)
Specifications of PIC18F45K22-I/PT
A/d Inputs
28-Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
35
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin TQFP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
3-8-bit, 4-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
PIC18F45K22-I/PT
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SST
Quantity:
3 400
Company:
Part Number:
PIC18F45K22-I/PT
Manufacturer:
Microchip Technology
Quantity:
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Part Number:
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Manufacturer:
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PIC18(L)F2X/4XK22
XORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS41412D-page 408
Q Cycle Activity:
Before Instruction
After Instruction
Decode
REG
W
REG
W
Q1
=
=
=
=
register ‘f’
Exclusive OR W with f
XORWF
0 f 255
d [0,1]
a [0,1]
(W) .XOR. (f) dest
N, Z
Exclusive OR the contents of W with
register ‘f’. If ‘d’ is ‘0’, the result is stored
in W. If ‘d’ is ‘1’, the result is stored back
in the register ‘f’ (default).
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank.
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f 95 (5Fh). See
Section 25.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode”
1
1
XORWF
Read
0001
Q2
AFh
B5h
1Ah
B5h
REG, 1, 0
f {,d {,a}}
10da
Process
Data
Q3
ffff
for details.
destination
Write to
Q4
ffff
Preliminary
2010 Microchip Technology Inc.
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