PIC16F819-I/SO Microchip Technology Inc., PIC16F819-I/SO Datasheet - Page 33

• Manufacturer Part Number: PIC16F819-I/SO
• Description: 18 PIN, 3.5 KB FLASH, 256 RAM, 16 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F819-I/SO

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 16
• Interface: I2C/SPI
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin SOIC
• Programmable Memory: 3.5K Bytes
• Ram Size: 256 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

An example of the complete four-word write sequence
is shown in Example 3-5. The initial address is loaded
into the EEADRH:EEADR register pair; the four words
of data are loaded using indirect addressing, assuming
that a row erase sequence has already been
performed.
EXAMPLE 3-5:
 2004 Microchip Technology Inc.
; This write routine assumes the following:
; 1. The 32 words in the erase block have already been erased.
; 2. A valid starting address (the least significant bits = '00') is loaded into EEADRH:EEADR
; 3. This example is starting at 0x100, this is an application dependent setting.
; 4. The 8 bytes (4 words) of data are loaded, starting at an address in RAM called ARRAY.
; 5. This is an example only, location of data to program is application dependent.
; 6. word_block is located in data memory.
LOOP
BANKSEL EECON1
BSF
BSF
BCF
BANKSEL word_block
MOVLW
MOVWF
BANKSEL EEADRH
MOVLW
MOVWF
MOVLW
MOVWF
BANKSEL ARRAY
MOVLW
MOVWF
BANKSEL EEDATA
MOVF
MOVWF
INCF
MOVF
MOVWF
INCF
BANKSEL EECON1
MOVLW
MOVWF
MOVLW
MOVWF
BSF
NOP
NOP
BANKSEL EEADR
INCF
BANKSEL word_block
DECFSZ
GOTO
BANKSEL EECON1
BCF
BSF
EECON1, EEPGD
EECON1, WREN
EECON1, FREE
.4
word_block
0x01
EEADRH
0x00
EEADR
ARRAY
FSR
INDF, W
EEDATA
FSR, F
INDF, W
EEDATH
FSR, F
0x55
EECON2
0xAA
EECON2
EECON1, WR
EEADR, f
word_block, f
loop
EECON1, WREN
INTCON, GIE
WRITING TO FLASH PROGRAM MEMORY
;prepare for WRITE procedure
;point to program memory
;allow write cycles
;perform write only
;prepare for 4 words to be written
;Start writing at 0x100
;load HIGH address
;load LOW address
;initialize FSR to start of data
;indirectly load EEDATA
;increment data pointer
;indirectly load EEDATH
;increment data pointer
;required sequence
;set WR bit to begin write
;instructions here are ignored as processor
;load next word address
;have 4 words been written?
;NO, continue with writing
;YES, 4 words complete, disable writes
;enable interrupts
PIC16F818/819
DS39598E-page 31