PIC16F57-I/P Microchip Technology Inc., PIC16F57-I/P Datasheet - Page 27

• Manufacturer Part Number: PIC16F57-I/P
• Description: 28 PIN, 3K FLASH, 72 RAM, 20 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F57-I/P

• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Frequency: 20 MHz
• Input Output: 20
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin PDIP
• Programmable Memory: 3K Bytes
• Ram Size: 72 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

5.1
The PIC16F5X family of devices incorporate on-chip
Power-on Reset (POR) circuitry which provides an
internal chip Reset for most power-up situations. To
use this feature, the user merely ties the MCLR/V
to V
Power-on Reset circuit is shown in Figure 5-1.
The Power-on Reset circuit and the Device Reset
Timer (Section 5.2) circuit are closely related. On
power-up, the Reset latch is set and the DRT is reset.
The DRT timer begins counting once it detects MCLR
to be high. After the time-out period, which is typically
18 ms, it will reset the Reset latch and thus end the on-
chip Reset signal.
A power-up example where MCLR is not tied to V
shown in Figure 5-3. V
before bringing MCLR high. The chip will actually come
out of Reset T
In Figure 5-4, the on-chip Power-on Reset feature is
being used (MCLR and V
is stable before the start-up timer times out and there is
no problem in getting a proper Reset. However,
Figure 5-5 depicts a problem situation where V
too slowly. The time between when the DRT senses a
high on the MCLR/V
V
uation, when the start-up timer times out, V
reached the V
not ensured to function correctly. For such situations,
we recommend that external RC circuits be used to
achieve longer POR delay times (Figure 5-2).
For more information on the PIC16F5X POR, see
Application Note AN522, “Power-Up Considerations”
at www.microchip.com.
 2004 Microchip Technology Inc.
DD
Note 1: When the device starts normal operation
) actually reach their full value is too long. In this sit-
DD
. A simplified block diagram of the on-chip
2: The POR is disabled when the device is
Power-on Reset (POR)
(exits
operating
quency, temperature, etc.) must be met to
ensure operation. If these conditions are
not met, the device must be held in Reset
until the operating conditions are met.
in Sleep.
DD
DRT
(min) value and the chip is, therefore,
msec after MCLR goes high.
PP
the
DD
pin and the MCLR/V
parameters
DD
is allowed to rise and stabilize
Reset
are tied together). The V
condition),
(voltage,
PP
DD
pin (and
DD
has not
device
PP
DD
rises
fre-
pin
DD
is
FIGURE 5-2:
• External Power-on Reset circuit is required
• R < 40 k is recommended to make sure that
• R1 = 100
only if V
helps discharge the capacitor quickly when
V
voltage drop across R does not violate the
device electrical specification.
flowing into MCLR from external capacitor C
in the event of MCLR pin breakdown due to
Electrostatic Discharge (ESD) or Electrical
Overstress (EOS).
DD
V
DD
powers down.
D
DD
V
power-up is too slow. The diode D
to 1 k will limit any current
DD
R
EXTERNAL POWER-ON
RESET CIRCUIT (FOR
SLOW V
C
R1
PIC16F5X
DD
POWER-UP)
MCLR
DS41213C-page 25
PIC16F5X