PIC16F627-04/P Microchip Technology Inc., PIC16F627-04/P Datasheet - Page 105

• Manufacturer Part Number: PIC16F627-04/P
• Description: 18 PIN, 1.75 KB FLASH, 224 RAM, 16 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F627-04/P

• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 128 Bytes
• Input Output: 16
• Interface: SCI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 1.75K Bytes
• Ram Size: 224 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

TABLE 14-9:
14.7
During an interrupt, only the return PC value is saved
on the stack. Typically, users may wish to save key
registers during an interrupt (e.g., W register and
STATUS register). This will have to be implemented in
software.
Example 14-2 stores and restores the STATUS and W
registers. The user register, W_TEMP, must be defined
in a common memory location (i.e., W_TEMP is
defined at 0x70 in Bank 0 and is therefore, accessible
at 0xF0, 0x17 and 0xIFD). The Example 14-2:
• Stores the W register
• Stores the STATUS register
• Executes the ISR code
• Restores the STATUS (and bank select bit
• Restores the W register
EXAMPLE 14-2:
 2003 Microchip Technology Inc.
0Bh
0Ch
8Ch
Note 1: Other (non Power-up) Resets include MCLR Reset, Brown-out Detect Reset and Watchdog Timer Reset during normal
MOVWF
SWAPF
BCF
MOVWF
SWAPF
MOVWF
SWAPF
SWAPF
Address
register)
:
: (ISR)
:
W_TEMP
STATUS,W
STATUS,RP0
STATUS_TEMP
STATUS_TEMP,W ;swap STATUS_TEMP register
STATUS
W_TEMP,F
W_TEMP,W
Context Saving During Interrupts
operation.
INTCON
PIR1
PIE1
Name
SUMMARY OF INTERRUPT REGISTERS
EEIF
EEIE
Bit 7
GIE
SAVING THE STATUS
AND W REGISTERS IN
RAM
;copy W to temp register,
could be in either bank
;swap status to be saved
into W
;change to bank 0 regardless
of current bank
;save status to bank 0
register
into W, sets bank to origi-
nal
state
;move W into STATUS register
;swap W_TEMP
;swap W_TEMP into W
CMIF
CMIE
PEIE
Bit 6
RCIE
RCIF
Bit 5
T0IE
Bit 4
INTE
TXIF
TXIE
Preliminary
RBIE
Bit 3
—
—
14.8
The Watchdog Timer is a free running on-chip RC
oscillator which does not require any external compo-
nents. This RC oscillator is separate from the ER
oscillator of the CLKIN pin. That means that the WDT
will run, even if the clock on the OSC1 and OSC2 pins
of the device has been stopped, for example, by
execution of a
operation, a WDT timeout generates a device RESET.
If the device is in SLEEP mode, a WDT timeout causes
the device to wake-up and continue with normal opera-
tion. The WDT can be permanently disabled by
programming the configuration bit WDTE as clear
(Section 14.1).
14.8.1
The WDT has a nominal timeout period of 18 ms (with
no prescaler). The timeout periods vary with tempera-
ture, V
DC specs). If longer timeout periods are desired, a
postscaler with a division ratio of up to 1:128 can be
assigned to the WDT under software control by writing
to the OPTION register. Thus, timeout periods up to 2.3
seconds can be realized.
The
and the postscaler, if assigned to the WDT, and prevent
it from timing out and generating a device RESET.
The TO bit in the STATUS register will be cleared upon
a Watchdog Timer timeout.
14.8.2
It should also be taken in account that under worst case
conditions (V
WDT prescaler), it may take several seconds before a
WDT timeout occurs.
CCP1IF TMR2IF TMR1IF
CCP1IE TMR2IE TMR1IE
Bit 2
T0IF
CLRWDT
DD
Watchdog Timer (WDT)
and process variations from part to part (see
WDT PERIOD
WDT PROGRAMMING
CONSIDERATIONS
Bit 1
INTF
DD
and
= Min., Temperature = Max., max.
SLEEP
SLEEP
Bit 0
RBIF
PIC16F62X
instruction. During normal
instructions clear the WDT
0000 000x
0000 -000
0000 -000
POR Reset
Value on
DS40300C-page 103
Value on all
0000 000u
0000 -000
0000 -000
RESETS
other
(1)