PIC16F1827-E/P Microchip Technology Inc., PIC16F1827-E/P Datasheet - Page 226
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC16F1827-E/P
Manufacturer Part Number
PIC16F1827-E/P
Description
7 KB Flash, 384 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F1826-ISO.pdf
(406 pages)
Specifications of PIC16F1827-E/P
A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
CAN/I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
7K Bytes
Ram Size
384 Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Standby Current (pic16lf182x)
30 nA @ 1.8 V, Typical
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PIC16(L)F1826/27
24.5
REGISTER 24-1:
DS41391D-page 226
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5-4
bit 3-0
Note 1:
R/W-00
CCP Control Registers
PxM<1:0>
These bits are not implemented on CCP<4:3>.
PxM<1:0>: Enhanced PWM Output Configuration bits
Capture mode:
Unused
Compare mode:
Unused
If CCPxM<3:2> = 00, 01, 10:
xx = PxA assigned as Capture/Compare input; PxB, PxC, PxD assigned as port pins
If CCPxM<3:2> = 11:
00 = Single output; PxA modulated; PxB, PxC, PxD assigned as port pins
01 = Full-Bridge output forward; PxD modulated; PxA active; PxB, PxC inactive
10 = Half-Bridge output; PxA, PxB modulated with dead-band control; PxC, PxD assigned as port pins
11 = Full-Bridge output reverse; PxB modulated; PxC active; PxA, PxD inactive
DCxB<1:0>: PWM Duty Cycle Least Significant bits
Capture mode:
Unused
Compare mode:
Unused
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL.
CCPxM<3:0>: ECCPx Mode Select bits
0000 =Capture/Compare/PWM off (resets ECCPx module)
0001 =Reserved
0010 =Compare mode: toggle output on match
0011 =Reserved
0100 =Capture mode: every falling edge
0101 =Capture mode: every rising edge
0110 =Capture mode: every 4th rising edge
0111 =Capture mode: every 16th rising edge
1000 =Compare mode: initialize ECCPx pin low; set output on compare match (set CCPxIF)
1001 =Compare mode: initialize ECCPx pin high; clear output on compare match (set CCPxIF)
1010 =Compare mode: generate software interrupt only; ECCPx pin reverts to I/O state
1011 =Compare mode: Special Event Trigger (ECCPx resets Timer, sets CCPxIF bit, starts A/D conversion if A/D
CCP Modules only:
11xx =PWM mode
ECCP Modules only:
1100 =PWM mode: PxA, PxC active-high; PxB, PxD active-high
1101 =PWM mode: PxA, PxC active-high; PxB, PxD active-low
1110 =PWM mode: PxA, PxC active-low; PxB, PxD active-high
1111 =PWM mode: PxA, PxC active-low; PxB, PxD active-low
(1)
R/W-0/0
CCPxCON: CCPx CONTROL REGISTER
module is enabled)
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
DCxB<1:0>
(1)
R/W-0/0
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Reset
R/W-0/0
(1)
R/W-0/0
CCPxM<3:0>
2011 Microchip Technology Inc.
R/W-0/0
R/W-0/0
bit 0
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