PIC16F630-I/P Microchip Technology Inc., PIC16F630-I/P Datasheet - Page 56
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PIC16F630-I/P
Manufacturer Part Number
PIC16F630-I/P
Description
14 PIN, 1.75 KB FLASH, 64 RAM, 12 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F630-IP.pdf
(132 pages)
Specifications of PIC16F630-I/P
Comparators
1
Cpu Speed
5 MIPS
Eeprom Memory
128 Bytes
Input Output
12
Memory Type
Flash
Number Of Bits
8
Package Type
14-pin PDIP
Programmable Memory
1.75K Bytes
Ram Size
64 Bytes
Speed
20 MHz
Timers
1-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F630-I/P
Manufacturer:
FUJISU
Quantity:
12
PIC16F630/676
9.1
The configuration bits can be programmed (read as '0'),
or left unprogrammed (read as '1') to select various
device configurations, as shown in Register 9-1. These
bits are mapped in program memory location 2007h.
REGISTER 9-1:
DS40039C-page 54
bit 13
bit 13-12
bit 11-9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
R/P-1 R/P-1
BG1
Configuration Bits
BG0
BG1:BG0: Bandgap Calibration bits for BOD and POR voltage
00 = Lowest bandgap voltage
11 = Highest bandgap voltage
Unimplemented: Read as ‘0’
CPD: Data Code Protection bit
1 = Data memory code protection is disabled
0 = Data memory code protection is enabled
CP: Code Protection bit
1 = Program Memory code protection is disabled
0 = Program Memory code protection is enabled
BODEN: Brown-out Detect Enable bit
1 = BOD enabled
0 = BOD disabled
MCLRE: RA3/MCLR pin function select
1 = RA3/MCLR pin function is MCLR
0 = RA3/MCLR pin function is digital I/O, MCLR internally tied to V
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
FOSC2:FOSC0: Oscillator Selection bits
111 = RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN
110 = RC oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN
101 = INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN
100 = INTOSC oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN
011 = EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN
010 = HS oscillator: High speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN
001 = XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN
000 = LP oscillator: Low power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN
Note 1: The Bandgap Calibration bits are factory programmed and must be read and saved prior to erasing
Legend:
P = Programmed using ICSP
R = Readable bit
-n = Value at POR
U-0
—
2: The entire data EEPROM will be erased when the code protection is turned off.
3: The entire program memory will be erased, including OSCCAL value, when the code protection is
4: Enabling Brown-out Detect does not automatically enable Power-up Timer.
5: When MCLR is asserted in INTOSC or RC mode, the internal clock oscillator is disabled.
the device as specified in the PIC16F630/676 Programming Specification. These bits are reflected
in an export of the configuration word. Microchip Development Tools maintain all calibration bits to
factory settings.
turned off.
CONFIG — CONFIGURATION WORD (ADDRESS: 2007h)
U-0
—
U-0
—
(3)
R/P-1
CPD
(2)
W = Writable bit
1 = bit is set
R/P-1
(4)
CP
(5)
BODEN MCLRE PWRTE WDTE F0SC2 F0SC1 F0SC0
R/P-1
Note:
R/P-1
U = Unimplemented bit, read as ‘0’
0 = bit is cleared
memory space. It belongs to the special con-
figuration memory space (2000h - 3FFFh),
which can be accessed only during program-
ming. See PIC16F630/676 Programming
Specification for more information.
Address 2007h is beyond the user program
(1)
R/P-1
DD
R/P-1
2003 Microchip Technology Inc.
x = bit is unknown
R/P-1
R/P-1
R/P-1
bit 0