DS26518GN+ Maxim Integrated Products, DS26518GN+ Datasheet - Page 38
![IC TXRX T1/E1/J1 8PORT 256-CSBGA](/photos/6/50/65053/256-csbga_21-0315_sml.jpg)
DS26518GN+
Manufacturer Part Number
DS26518GN+
Description
IC TXRX T1/E1/J1 8PORT 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Specifications of DS26518GN+
Number Of Drivers/receivers
8/8
Protocol
T1/E1/J1
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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9.8.1.4 Receiving Mapped T1 Channels from a 2.048MHz Backplane
Setting the TSCLKM bit in TIOCR.4 enables the transmit elastic store to operate with a 2.048MHz backplane (32
time slots / frame). In this mode the user can choose which of the backplane channels on TSERn will be mapped
into the T1 data stream by programming the Transmit Blank Channel Select registers (TBCS1–4). A logic 1 in the
associated bit location forces the transmit elastic store to ignore backplane data for that channel. Typically the user
will want to program eight channels to be ignored. The default (power-up) configuration will ignore channels 25–32,
so that the first 24 backplane channels are mapped into the T1 transmit data stream.
For example, if the user desired to transmit data from the 2.048MHz backplane channels 2–16 and 18–26, the
TBCS registers should be programmed as follows:
9.8.1.5 Mapping T1 Channels onto a 2.048MHz Backplane
Setting the RSCLKM bit in RIOCR.4 will enable the receive elastic store to operate with a 2.048MHz backplane (32
time slots/frame). In this mode the user can choose which of the backplane channels on RSERn receive the T1
data by programming the Receive Blank Channel Select registers (RBCS1–4). A logic 1 in the associated bit
location will force RSERn high for that backplane channel. Typically the user will want to program eight channels to
be blanked. The default (power-up) configuration will blank channels 25 to 32, so that the 24 T1 channels are
mapped into the first 24 channels of the 2.048MHz backplane. If the user chooses to blank channel 1 (TS0) by
setting RBCS1.0 = 1, then the F-bit will be passed into the MSB of TS0 on RSERn.
For example, if:
Then on RSERn:
Note that when two or more sequential channels are chosen to be blanked, the receive slip zone select bit should
be set to zero. If the blank channels are distributed (such as 1, 5, 9, 13, 17, 21, 25, 29), the RSZS bit can be set to
one, which can provide a lower occurrence of slips in certain applications.
If the two-frame elastic buffer either fills or empties, a controlled slip will occur. If the buffer empties, then a full
frame of data will be repeated at RSERn and the RLS4.5 and RLS4.6 bits will be set to a one. If the buffer fills, then
a full frame of data will be deleted and the RLS4.5 and RLS4.7 bits will be set to a one.
9.8.1.6 Receiving Mapped E1 Transmit Channels from a 1.544MHz Backplane
The user can use the TSCLKM bit in TIOCR.4 to enable the transmit elastic store to operate with a 1.544MHz
backplane (24 channels / frame + F-bit). In this mode the user can choose which of the E1 time slots will have all-
ones data inserted by programming the Transmit Blank Channel Select registers (TBCS1–4). A logic 1 in the
associated bit location will cause the elastic store to force all ones at the outgoing E1 data for that channel.
Typically the user will want to program eight channels to be blanked. The default (power-up) configuration will blank
channels 25 to 32, so that the first 24 E1 channels are mapped from the 24 channels of the 1.544MHz backplane.
TBCS1
TBCS2
TBCS3
TBCS4= FCh :: ignore backplane channels 27–32 ::
RBCS1
RBCS2
RBCS3
RBCS4
Channel 1 (MSB) = F-bit
Channel 1 (bits 1-7) = all ones
Channels 2-16 = T1 channels 1-15
Channel 17 = all ones
Channels 18-26 = T1 channels 16-24
Channels 27-32 = all ones
= 01h :: ignore backplane channel 1 ::
= 00h
= 01h :: ignore backplane channel 17 ::
= 01h
= 00h
= 01h
= FCh
38 of 312
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