DS26518GN+ Maxim Integrated Products, DS26518GN+ Datasheet - Page 264
DS26518GN+
Manufacturer Part Number
DS26518GN+
Description
IC TXRX T1/E1/J1 8PORT 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Specifications of DS26518GN+
Number Of Drivers/receivers
8/8
Protocol
T1/E1/J1
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0: Transmit FIFO Data Packet End (TDPE). When 0, the transmit FIFO data is not a packet end. When 1, the
transmit FIFO data is a packet end. This bit should be written before the last byte of the packet is written into
TH256FDR2.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: When read, the value of these bits is always zero.
Bits 7 to 0: Transmit FIFO Data (TFD[7:0]). These eight bits are the packet data to be stored in the transmit
FIFO. TFD[7] is the MSB, and TFD[0] is the LSB. If bit reordering is disabled, TFD[0] is the first bit transmitted, and
TFD[7] is the last bit transmitted. If bit reordering is enabled, TFD[7] is the first bit transmitted, and TFD[0] is the
last bit transmitted.
TFD7
—
7
0
7
0
TFD6
—
6
0
6
0
TH256FDR1
Transmit HDLC-256 FIFO Data Register 1
1502h + (20h x (n - 1)) : where n = 1 to 8
TH256FDR2
Transmit HDLC-256 FIFO Data Register 2
1503h + (20h x (n - 1)) : where n = 1 to 8
TFD5
—
5
0
5
0
264 of 312
TFD4
—
0
0
4
4
TFD3
—
3
0
3
0
TFD2
—
2
0
2
0
TFD1
—
1
0
1
0
TDPE
TFD0
0
0
0
0
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