PIC16F648A-I/P Microchip Technology Inc., PIC16F648A-I/P Datasheet - Page 106
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PIC16F648A-I/P
Manufacturer Part Number
PIC16F648A-I/P
Description
18 PIN, 7 KB FLASH, 256 RAM, 16 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F648A-IP.pdf
(132 pages)
Specifications of PIC16F648A-I/P
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
7K Bytes
Ram Size
256 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F648A-I/P
Manufacturer:
MICROCHIP
Quantity:
2 100
Part Number:
PIC16F648A-I/P
Manufacturer:
MICROCH
Quantity:
20 000
PIC16F630/676
FIGURE 12-10:
TABLE 12-9:
DS40039C-page 104
130
130
131
132
134
Note 1: ADRES register may be read on the following T
Param
No.
Note 1: If the A/D clock source is selected as RC, a time of T
* These parameters are characterized but not tested.
† Data in ‘Typ’ column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only
A/D DATA
2: See Table 7-1 for minimum conditions.
SAMPLE
A/D CLK
BSF ADCON0, GO
and are not tested.
ADRES
T
T
T
T
T
ADIF
Sym
AD
CNV
ACQ
AD
GO
GO
SLEEP instruction to be executed.
Q4
134
PIC16F676 A/D CONVERSION REQUIREMENTS
A/D Clock Period
A/D Internal RC
Oscillator Period
Conversion Time
(not including
Acquisition Time)
Acquisition Time
Q4 to A/D Clock
Start
132
Characteristic
PIC16F676 A/D CONVERSION TIMING (NORMAL MODE)
(T
(1)
OSC
/2)
(Note 2)
(1)
Min
3.0*
3.0*
2.0*
9
1.6
—
—
5*
OLD_DATA
8
T
Typ†
OSC
11.5
6.0
4.0
SAMPLING STOPPED
—
—
11
—
131
7
CY
/2
CY
cycle.
is added before the A/D clock starts. This allows the
6
Max
9.0*
6.0*
130
—
—
—
—
—
—
3
Units
T
µs
µs
µs
µs
µs
µs
—
AD
2
T
T
ADCS<1:0> = 11 (RC mode)
At V
At V
Set GO bit to new data in A/D result
register
The minimum time is the amplifier
settling time. This may be used if the
“new” input voltage has not changed
by more than 1 LSb (i.e., 4.1 mV @
4.096V) from the last sampled volt-
age (as stored on C
If the A/D clock source is selected as
RC, a time of T
the A/D clock starts. This allows the
SLEEP instruction to be executed.
OSC
OSC
1
DD
DD
2003 Microchip Technology Inc.
based, V
based, V
= 2.5V
= 5.0V
0
Conditions
REF
REF
CY
NEW_DATA
DONE
1 T
is added before
≥ 3.0V
full range
HOLD
CY
1 T
CY
).