PIC24FJ64GA004-I/PT Microchip Technology Inc., PIC24FJ64GA004-I/PT Datasheet - Page 124
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PIC24FJ64GA004-I/PT
Manufacturer Part Number
PIC24FJ64GA004-I/PT
Description
MCU, 16-Bit, 44-Pin, 64KB Flash, 8KB RAM, 35 I/O, Nanowatt
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC24FJ64GA004-IPT.pdf
(256 pages)
Specifications of PIC24FJ64GA004-I/PT
A/d Inputs
13 Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
35
Interface
I2C/SPI/UART
Memory Capacity
64 Kbytes
Memory Type
Flash
Number Of Bits
16
Number Of Inputs
35
Number Of Pins
44
Package Type
44-pin TQFP
Programmable Memory
64K Bytes
Ram Size
8K Bytes
Speed
32 MHz
Timers
5-16-bit
Voltage, Range
2-3.6 V
Voltage, Rating
2-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC24FJ64GA004 FAMILY
REGISTER 11-1:
DS39881B-page 122
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-0
TON
U-0
—
2:
In 32-bit mode, the T3CON or T5CON control bits do not affect 32-bit timer operation.
If TCS = 1, RPINRx (TxCK) must be configured to an available RPn pin. For more information, see
Section 9.4 “Peripheral Pin Select”.
TON: Timerx On bit
When TxCON<3> = 1:
1 = Starts 32-bit Timerx/y
0 = Stops 32-bit Timerx/y
When TxCON<3> = 0:
1 = Starts 16-bit Timerx
0 = Stops 16-bit Timerx
Unimplemented: Read as ‘0’
TSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
Unimplemented: Read as ‘0’
TGATE: Timerx Gated Time Accumulation Enable bit
When TCS = 1:
This bit is ignored.
When TCS = 0:
1 = Gated time accumulation enabled
0 = Gated time accumulation disabled
TCKPS1:TCKPS0: Timerx Input Clock Prescale Select bits
11 = 1:256
10 = 1:64
01 = 1:8
00 = 1:1
T32: 32-Bit Timer Mode Select bit
1 = Timerx and Timery form a single 32-bit timer
0 = Timerx and Timery act as two 16-bit timers
In 32-bit mode, T3CON control bits do not affect 32-bit timer operation.
Unimplemented: Read as ‘0’
TCS: Timerx Clock Source Select bit
1 = External clock from pin, TxCK (on the rising edge)
0 = Internal clock (F
Unimplemented: Read as ‘0’
TGATE
R/W-0
U-0
—
TxCON: TIMER2 AND TIMER4 CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
TCKPS1
R/W-0
TSIDL
R/W-0
OSC
/2)
TCKPS0
R/W-0
U-0
(1)
Preliminary
—
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
T32
U-0
—
(1)
U-0
U-0
—
—
© 2007 Microchip Technology Inc.
x = Bit is unknown
TCS
R/W-0
U-0
—
(2)
U-0
U-0
—
—
bit 8
bit 0
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