IRFPS40N50LPBF Vishay PCS, IRFPS40N50LPBF Datasheet - Page 2

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IRFPS40N50LPBF

Manufacturer Part Number
IRFPS40N50LPBF
Description
MOSFET, Power; N-Ch; VDSS 500V; RDS(ON) 0.087Ohm; ID 46A; TO-274AA; PD 540W; VGS +/-30V
Manufacturer
Vishay PCS
Datasheet

Specifications of IRFPS40N50LPBF

Current, Drain
46 A
Gate Charge, Total
380 nC
Package Type
TO-274AA
Polarization
N-Channel
Power Dissipation
540 W
Resistance, Drain To Source On
0.087 Ohm
Temperature, Operating, Maximum
+150 °C
Temperature, Operating, Minimum
-55 °C
Time, Turn-off Delay
50 ns
Time, Turn-on Delay
27 ns
Transconductance, Forward
21 S
Voltage, Breakdown, Drain To Source
500 V
Voltage, Forward, Diode
1.5 V
Voltage, Gate To Source
±30 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IRFPS40N50LPBF
Manufacturer:
VISHAY/威世
Quantity:
20 000
Company:
Part Number:
IRFPS40N50LPBF
Quantity:
540

ƒ
Static @ T
Avalanche Characteristics
IRFPS40N50LPbF
Notes:
Thermal Resistance
Dynamic @ T
∆V
C
Repetitive rating; pulse width limited by
I
I
max. junction temperature. (See Fig. 11).
T
Starting T
AS
SD
oss
Symbol
Symbol
Symbol
Symbol
J
V
C
(BR)DSS
R
V
≤ 150°C.
(BR)DSS
= 46A. (See Figure 12).
oss
R
≤ 46A, di/dt ≤ 550A/µs, V
t
t
C
C
C
R
R
I
I
C
eff. (ER)
E
E
Q
Q
C
DS(on)
gfs
GS(th)
R
d(on)
d(off)
I
DSS
GSS
Q
AR
t
t
θJC
θCS
oss
oss
oss
θJA
rss
AS
AR
iss
gs
gd
r
f
G
g
eff.
/∆T
J
J
J
= 25°C, L = 0.86mH, R
= 25°C (unless otherwise specified)
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Case-to-Sink, Flat, Greased Surface
Drain-to-Source Breakdown Voltage
J
Gate-to-Source Reverse Leakage
Single Pulse Avalanche Energy
Gate-to-Source Forward Leakage
Drain-to-Source Leakage Current
Repetitive Avalanche Energy
Gate-to-Drain ("Miller") Charge
= 25°C (unless otherwise specified)
Reverse Transfer Capacitance
Effective Output Capacitance
Effective Output Capacitance
Forward Transconductance
Internal Gate Resistance
Gate Threshold Voltage
Gate-to-Source Charge
Avalanche Current
Junction-to-Ambient
Turn-On Delay Time
Turn-Off Delay Time
Output Capacitance
Output Capacitance
Output Capacitance
Junction-to-Case
Total Gate Charge
Input Capacitance
(Energy Related)
Parameter
Parameter
Parameter
Parameter
Rise Time
DD
Fall Time
≤ V
G
(BR)DSS
= 25Ω,
Ù
h
h
,
Pulse width ≤ 400µs; duty cycle ≤ 2%.
C
as C
C
as C
oss
oss
Min. Typ. Max. Units
Min. Typ. Max. Units
θ
500
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
3.0
21
oss
oss
eff. is a fixed capacitance that gives the same charging time
eff.(ER) is a fixed capacitance that stores the same energy
11200
while V
while V
0.087 0.100
8110
0.60
0.90
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
170
960
130
240
440
310
27
50
69
DS
DS
Typ.
-100
Typ.
0.24
–––
–––
100
–––
–––
380
190
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
5.0
2.0
50
80
is rising from 0 to 80% V
is rising from 0 to 80% V
V/°C
mA
µA
nA
nC
pF
ns
V
V
S
V
V
V
V
GS
GS
DS
GS
V
V
Reference to 25°C, I
= 0V, VDS = 400V, ƒ = 1.0MHz
GS
= 0V, VDS = 1.0V, ƒ = 1.0MHz
GS
= 400V, V
= 10V, See Fig. 14a & 14b
ƒ = 1.0MHz, See Fig. 5
V
V
V
Max.
V
= 10V, See Fig. 7 & 15
f = 1MHz, open drain
= 0V,V
Max.
0.23
V
920
–––
GS
DS
DS
46
54
40
GS
DS
= 10V, I
= V
Conditions
= 500V, V
Conditions
= 0V, I
V
V
R
= 50V, I
V
V
V
DSS
DSS
V
I
DS
DD
I
G
GS
GS
DS
D
D
DS
GS
GS
GS
= 0.85Ω
= 46A
= 46A
= 400V
= 250V
.
.
, I
= -30V
= 0V to 400V
= 30V
= 25V
= 0V
= 0V, T
D
D
D
= 250µA
D
= 250µA
= 28A
GS
= 46A
D
= 0V
J
= 1mA
= 125°C
Units
Units
f
°C/W
mJ
mJ
A
f
g
f
2

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