DS1305E+ Dallas Semiconductor, DS1305E+ Datasheet - Page 14

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DS1305E+

Manufacturer Part Number
DS1305E+
Description
Clock, Real Time; TSSOP; 20 Pins; 2.0 to 5.5 V; 5.8 V (Max.); +0.8 V (Max.)
Manufacturer
Dallas Semiconductor
Datasheet

Specifications of DS1305E+

Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
3-WIRE INTERFACE
The 3-wire interface mode operates similarly to the SPI mode. However, in 3-wire mode there is one I/O
instead of separate data in and data out signals. The 3-wire interface consists of the I/O (SDI and SDO
pins tied together), CE, and SCLK pins. In 3-wire mode, each byte is shifted in LSB first unlike SPI mode
where each byte is shifted in MSB first.
As is the case with the SPI mode, an address byte is written to the device followed by a single data byte
or multiple data bytes. Figure 9 illustrates a read and write cycle. In 3-wire mode, data is input on the
rising edge of SCLK and output on the falling edge of SCLK.
Figure 9. 3-WIRE SINGLE-BYTE TRANSFER
I/O*
SCLK
CE
SCLK
CE
I/O*
NOTE: IN BURST MODE, CE IS KEPT HIGH AND ADDITIONAL SCLK CYCLES ARE SENT UNTIL THE END OF THE BURST.
* I/O IS SDI AND SDO TIED TOGETHER.
A0
A0
A1
A1
A2
A2
A3
A3
A4
A4
A5
A5 A6
A6
1
14 of 21
0
D0
D0
D1
D1
D2
D2
D3
SINGLE-BYTE READ
D3
SINGLE-BYTE WRITE
D4
D4
D5
D5
D6 D7
D6
D7

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