PIC12F629-I/P Microchip Technology Inc., PIC12F629-I/P Datasheet - Page 31

• Manufacturer Part Number: PIC12F629-I/P
• Description: 8 PIN, 1.75 KB FLASH, 64 RAM, 6 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC12F629-I/P

• Comparators: 1
• Cpu Speed: 5 MIPS
• Eeprom Memory: 128 Bytes
• Input Output: 5
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 8-pin PDIP
• Programmable Memory: 1.75K Bytes
• Ram Size: 64 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

4.4
An 8-bit counter is available as a prescaler for the
Timer0 module, or as a postscaler for the Watchdog
Timer. For simplicity, this counter will be referred to as
“prescaler” throughout this Data Sheet. The prescaler
assignment is controlled in software by the control bit
PSA (OPTION_REG<3>). Clearing the PSA bit will
assign the prescaler to Timer0. Prescale values are
selectable via the PS2:PS0 bits (OPTION_REG<2:0>).
The prescaler is not readable or writable. When
assigned to the Timer0 module, all instructions writing
to the TMR0 register (e.g., CLRF 1,
BSF 1, x....etc.) will clear the prescaler. When
assigned to WDT, a CLRWDT instruction will clear the
prescaler along with the Watchdog Timer.
4.4.1
The prescaler assignment is fully under software
control (i.e., it can be changed “on the fly” during
program execution). To avoid an unintended device
RESET,
(Example 4-1) must be executed when changing the
prescaler assignment from Timer0 to WDT.
TABLE 4-1:
 2003 Microchip Technology Inc.
01h
0Bh/8Bh
81h
85h
Legend:
Address
Prescaler
TMR0
INTCON
OPTION_REG
TRISIO
Shaded cells are not used by the Timer0 module.
— = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown.
the
SWITCHING PRESCALER
ASSIGNMENT
Name
REGISTERS ASSOCIATED WITH TIMER0
following
Timer0 Module Register
GPPU
Bit 7
GIE
—
instruction
INTEDG
Bit 6
PEIE
—
TRISIO5 TRISIO4 TRISIO3 TRISIO2 TRISIO1 TRISIO0 --11 1111
T0CS
MOVWF 1,
Bit 5
T0IE
sequence
T0SE
Bit 4
INTE
GPIE
Bit 3
PSA
EXAMPLE 4-1:
To change prescaler from the WDT to the TMR0
module, use the sequence shown in Example 4-2. This
precaution must be taken even if the WDT is disabled.
EXAMPLE 4-2:
bcf
clrwdt
clrf
bsf
movlw
movwf
clrwdt
movlw
movwf
bcf
clrwdt
bsf
movlw
movwf
bcf
Bit 2
T0IF
PS2
STATUS,RP0
TMR0
STATUS,RP0
b’00101111’ ;Required if desired
OPTION_REG
b’00101xxx’ ;Set postscaler to
OPTION_REG
STATUS,RP0
STATUS,RP0
b’xxxx0xxx’ ;Select TMR0,
OPTION_REG
STATUS,RP0
Bit 1
INTF
PS1
PIC12F629/675
CHANGING PRESCALER
(TIMER0→WDT)
CHANGING PRESCALER
(WDT→TIMER0)
GPIF
Bit 0
PS0
;Bank 0
;Clear WDT
;Clear TMR0 and
; prescaler
;Bank 1
; PS2:PS0 is
; 000 or 001
;
; desired WDT rate
;Bank 0
;Clear WDT and
; postscaler
;Bank 1
; prescale, and
; clock source
;
;Bank 0
POR, BOD
xxxx xxxx
0000 0000
1111 1111
Value on
DS41190C-page 29
uuuu uuuu
0000 000u
1111 1111
--11 1111
Value on
RESETS
all other