KSZ8721B Micrel Inc, KSZ8721B Datasheet

IC TXRX PHY 10/100 2.5V 48-SSOP

KSZ8721B

Manufacturer Part Number
KSZ8721B
Description
IC TXRX PHY 10/100 2.5V 48-SSOP
Manufacturer
Micrel Inc
Type
Transceiverr
Datasheets

Specifications of KSZ8721B

Number Of Drivers/receivers
1/1
Protocol
MII, RMII
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Package / Case
48-SSOP
Data Rate
100Mbps
Supply Voltage Range
2.375V To 2.625V
Logic Case Style
SSOP
No. Of Pins
48
Operating Temperature Range
0°C To +70°C
Msl
MSL 2 - 1 Year
Ic Function
Transceiver IC
Termination Type
SMD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1627 - BOARD EVALUATION FOR KSZ8721BMC576-1626 - BOARD EVALUATION FOR KSZ8721BL
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-1026-5
576-1510-5
576-1510-5
KSZ8721B

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General Description
Operating at 2.5 volts to meet low voltage and low power
requirements, the KS8721B/BT is a 10BaseT/100BaseTX/
FX Physical Layer Transceiver, which provides an MII to
transmit and receive data. It contains the 10BaseT Physical
Medium Attachment (PMA), Physical Medium Dependent
(PMD), and Physical Coding Sub-layer (PCS) functions.
Moreover, the KS8721B/BT has on-chip 10BaseT output
filtering, which eliminates the need for external filters and
allows a single set of line magnetics to be used to meet
requirements for both 100BaseTX and 10BaseT.
The KS8721B/BT can automatically configure itself for 100 or
10 Mbps and full or half duplex operation, using on-chip Auto-
Negotiation algorithm. It is an ideal choice of physical layer
transceiver for 100BaseTX/10BaseT applications.
Data sheets and support documentation can be found on
Micrel’s web site at www.micrel.com.
Functional Diagram
April 2005
KS8721B/BT
Micrel, Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
TX+
TX-
RX+
RX-
XO
XI
Transmitter
PLL
Wander Correction
10BaseT
Receiver
MLT3 Decoder
Adaptive EQ
NRZI/NRZ
Base Line
Shaper
10/100
Pulse
MLT3 Encoder
NRZ/NRZI
Negotiation
PWRDWN
Recovery
Down or
Saving
Power
Clock
Auto
1
Features
• Single chip 100BaseTX/100BaseFX/10BaseT physical
• 2.5V CMOS design, power consumption <200mW
• Fully compliant to IEEE 802.3u standard
• Supports Media Independent Interface (MII) and
• Supports 10BaseT, 100BaseTX and 100BaseFX with
• Supports power down mode and power saving mode
• Configurable through MII serial management ports or via
• Supports auto-negotiation and manual selection for
• On-chip built-in analog front end filtering for both
2.5V 10/100BasTX/FX MII Physical Layer Transceiver
layer solution
(excluding output driver current )
Reduced MII (RMII)
Far_End_Fault Detection
external control pins
10/100Mbps speed and full/half-duplex mode
100BaseTX and 10BaseT
Manchester Encoder
Manchester Decoder
4B/5B Encoder
4B/5B Decoder
Parallel/Serial
Parallel/Serial
Serial/Parallel
Serial/Parallel
Descrambler
Scrambler
KS8721B/BT
Rev. 2.3
Controller
Registers
Interface
MII/RMII
Driver
LED
and
TXD3
TXD2
CRS
MDIO
MDC
RXD3
RXD2
COL
SPD
TXD1
TXD0
TXER
TXC
TXEN
COL
RXD1
RXD0
RXER
RXDV
RXC
LINK
FDX
M9999-041405
Micrel, Inc.

Related parts for KSZ8721B

KSZ8721B Summary of contents

Page 1

KS8721B/BT General Description Operating at 2.5 volts to meet low voltage and low power requirements, the KS8721B/ 10BaseT/100BaseTX/ FX Physical Layer Transceiver, which provides an MII to transmit and receive data. It contains the 10BaseT Physical Medium Attachment ...

Page 2

... Part Number Temperature Range KS8721B 0°C to +70°C KS8721BI –40°C to +85°C KSZ8721B 0°C to +70°C KS8721BT 0°C to +70°C KSZ8721BT 0°C to +70°C 2 Micrel, Inc. Package 48-Pin SSOP 48-Pin SSOP 48-Pin SSOP Lead Free 48-Pin TQFP 48-Pin TQFP Lead Free ...

Page 3

KS8721B/BT Revision History Revision Date Summary of Changes 1.0 2/29/02 Document Origination (Preliminary) 2.0 4/01/02 Update timing Spec from page 33 to page 37 Change Revision ID from 1000 to 1001 Add new control register bit, Control Register 0 Bit ...

Page 4

KS8721B/BT Table Of Contents Pin Description ............................................................................................................................................................ 6 Strapping Option ......................................................................................................................................................... 9 Pin Configuration ...................................................................................................................................................... 10 Introduction ........................................................................................................................................................... 11 100BaseTX Transmit ........................................................................................................................................... 11 100BaseTX Receive ............................................................................................................................................ 11 PLL Clock Synthesizer ......................................................................................................................................... 11 Scrambler/De-scrambler (100BaseTX only) ........................................................................................................ 11 10BaseT Transmit ............................................................................................................................................... ...

Page 5

KS8721B/BT Absolute Maximum Ratings ..................................................................................................................................... 22 Operating Ratings ..................................................................................................................................................... 22 Electrical Characteristics .......................................................................................................................................... 22 Timing Diagrams ....................................................................................................................................................... 24 Selection of Isolation Transformers ........................................................................................................................ 30 Selection of Reference Crystals ............................................................................................................................... 30 Package Outline and Dimensions ............................................................................................................................ 31 April 2005 5 Micrel, ...

Page 6

KS8721B/BT Pin Description Pin Number Pin Name Type 1 MDIO 2 MDC 3 RXD3/ Ipd/O PHYAD1 4 RXD2/ Ipd/O PHYAD2 5 RXD1/ Ipd/O PHYAD3 6 RXD0/ Ipd/O PHYAD4 7 VDDIO 8 GND GND 9 RXDV/ Ipd/O CRSDV/ PCS_LPBK 10 RXC ...

Page 7

KS8721B/BT Pin Number Pin Name Type 25 INT#/ Ipu/O PHYAD0 22 CRS/ Ipd/O RMII_BTB 23 GND GND 26 LED0/TEST Ipu/O 27 LED1/ Ipu/O SPD100/ noFEF 28 LED2/ Ipu/O DUPLEX 29 LED3/ Ipu/O NWAYEN 30 PD# 31 VDDRX 32 RX- 33 ...

Page 8

KS8721B/BT Pin Number Pin Name Type 37 REXT 38 VDDRCV 39 GND GND 40 TX- 41 TX+ 42 VDDTX 43 GND GND 44 GND GND VDDPLL 48 RST# Note 1. Pwr = power supply GND ...

Page 9

KS8721B/BT (Note 1) Strapping Options Pin Number Pin Name Type 6,5, PHYAD[4:1]/ Ipd/O 4,3 RXD[0:3] 25 PHYAD0/ Ipu/O INT# (3) 9 PCS_LPBK/ Ipd/O RXDV (3) 11 ISO/RXER Ipd/O (3) 21 RMII/COL Ipd/O (3) 22 RMII_BTB Ipd/O CRS 27 SPD100/ Ipu/O ...

Page 10

KS8721B/BT Pin Configuration MDIO 1 MDC 2 R3D3/PHYAD1 3 RXD2/PHYAD2 4 RXD1/PHYAD3 5 RXD0/PHYAD4 6 VDDIO 7 GND 8 RXDV/PCS_LPBK 9 RXC 10 RXER/ISO 11 GND 12 VDDC 13 TXER 14 TXC/REF_CLK 15 TXEN 16 TXD0 17 TXD1 18 TXD2 ...

Page 11

KS8721B/BT Introduction 100BaseTX Transmit The 100BaseTX transmit function performs parallel to serial conversion, NRZ to NRZI conversion, MLT-3 encoding and transmission. The circuitry starts with a parallel to serial conversion, which converts the 25MHz, 4-bit nibbles into a 125 MHz ...

Page 12

KS8721B/BT During auto-negotiation, the contents of Register 4, coded in Fast Link Pulse (FLP), will be sent to its link partner under the conditions of power-on, link-loss or re-start. At the same time, the KS8721B/BT will monitor incoming data to ...

Page 13

KS8721B/BT Collision: Whenever the line state is half-duplex and the transmitter and receiver are active at the same time, the KS8721B/ BT asserts its collision signal, which is asynchronous to any clock. RMII (Reduced MII) Data Interface RMII interface specifies ...

Page 14

KS8721B/BT Transmit Data [1:0] (TXD[1:0]) Transmit Data TXD[1:0] shall transition synchronously with respect to REF_CLK. When TX_EN is asserted, TXD[1:0] are accepted for transmission by the PHY. TXD[1:0] shall be “00” to indicate idle when TX_EN is de-asserted. Values of ...

Page 15

KS8721B/BT RMII Receive Timing REF_CLK RXD[1:0] RXDV RXER Parameter REF_CLK Frequency RXD[1:0], CRS_DV, RX_ER Output delay from REF_CLK rising edge Auto Crossover (Auto MDI/MDI-X) Automatic MDI/MDI-X configuration is intended to eliminate the need for crossover cables between similar devices. The ...

Page 16

KS8721B/BT Power Management The KS8721B/BT offers the following modes for power management: • Power Down Mode: This mode can be achieved by writing to Register 0.11 or pulling pin 30 PD# Low. • Power Saving Mode: This mode can be ...

Page 17

KS8721B/BT Register Map Register No. Description 0h Basic Control Register 1h Basic Status Register 2h PHY Identifier I 3h PHY Identifier II 4h Auto-Negotiation Advertisement Register 5h Auto-Negotiation Link Partner Ability Register 6h Auto-Negotiation Expansion Register 7h Auto-Negotiation Next Page ...

Page 18

KS8721B/BT Address Name 1.10:7 Reserved 1.6 No Preamble 1.5 Auto-Negotiation Complete 1.4 Remote Fault 1.3 Auto-Negotiation Ability 1.2 Link Status 1.1 Jabber Detect 1.0 Extended Capability Register 2h - PHY Identifier 1 2.15:0 PHY ID Number Register 3h - PHY ...

Page 19

KS8721B/BT Address Name 5.11:10 Pause 5.9 100 BaseT4 5.8 100BaseTX Full Duplex 5.7 100BaseTX 5.6 10BaseT Full Duplex 5.5 10BaseT 5.4:0 Selector Field Register 6h - Auto-Negotiation Expansion 6.15:5 Reserved 6.4 Parallel Detection Fault 6.3 Link Partner Next Page Able ...

Page 20

KS8721B/BT Address Name Register 15h - RXER Counter 15.15:0 RXER Counter Register 1bh - Interrupt Control/Status Register 1b.15 Jabber Interrupt Enable 1b.14 Receive Error Interrupt Enable 1b.13 Page Received Interrupt Enable 1b.12 Parallel Detect Fault Interrupt Enable 1b.11 Link Partner ...

Page 21

KS8721B/BT Address Name 1f.6 Enable Pause (Flow-Control Result) 1f.5 PHY Isolate 1f.4:2 Operation Mode Indication [000] = still in auto-negotiation 1f.1 Enable SQE Test 1f.0 Disable Data Scrambling Note 1. RW: Read/Write, RO: Read only, SC: Self clear, LH: Latch ...

Page 22

KS8721B/BT Absolute Maximum Ratings Supply Voltage ( DDC DD_PLL DD_TX DD_RCV V ) ................................................... –0.5V to +3.0V DD_RX (V ) .................................................... –0.5V to +4.0V DDIO Input Voltage ............................................... –0.5V to +4.0V Output Voltage ............................................ ...

Page 23

KS8721B/BT Symbol Parameter 10BaseTX Receive R RX+/RX– Differential IN Input Resistance V Squelch Threshold SQ 10BaseTX Transmit (measured differentially after 1:1 transformer) V Peak Differential Output Voltage P Jitters Added Rise/Fall Time r t Clock Outputs X1, ...

Page 24

KS8721B/BT Timing Diagrams TXC TXEN TXD[3:0] CRS TXP/TXM SQE Timing TXC TXEN COL Symbol Parameter t TXD [3:0] Set-Up to TXC High SU1 t TXEN Set-Up to TXC High SU2 t TXD [3:0] Hold After TXC High HD1 t TXEN ...

Page 25

KS8721B/BT TXC TXEN TXD[3:0], TXER CRS TX+/TX- Symbol Parameter t TXD [3:0] Set-Up to TXC High SU1 t TXEN Set-Up to TXC High SU2 t TXD [3:0] Hold After TXC High HD1 t TXER Hold After TXC High HD2 t ...

Page 26

KS8721B/BT Start of RX+/RX- Stream CRS RXDV RXD[3:0] RXER RXC Symbol Parameter t RXC Period P t RXC Pulse Width WL t RXC Pulse Width WH t RXD [3:0], RXER, RXDV Set-Up to Rising Edge of RXC SU t RXD ...

Page 27

KS8721B/BT TX+/TX- TX+/TX- Figure 7. Auto-Negotiation/Fast Link Pulse Timing Symbol Parameter t FLP Burst to FLP Burst BTB t FLP Burst Width FLPW t Clock/Data Pulse Width PW t Clock Pulse to Data Pulse CTD t Clock Pulse to Clock ...

Page 28

KS8721B/BT MDC MDIO (Into Chip) MDIO (Out of Chip) Symbol Parameter t MDC Period P t MDIO Set-Up to MDC (MDIO as input) MD1 t MDIO Hold after MDC (MDIO as input) MD2 t MDC to MDIO Valid (MDIO as ...

Page 29

KS8721B/BT Supply Voltage RST_N Strap-In Value Strap-In / Output Pin Symbol Parameter t Stable Supply Voltages to Reset High sr t Configuration Set-Up Time cs t Configuration Hold Time ch t Reset to Strap-In Pin Output rc Reset Circuit Diagram ...

Page 30

KS8721B/BT Selection of Isolation Transformer One simple 1:1 isolation transformer is needed at the line interface. An isolation transformer with integrated common-mode choke is recommended for exceeding FCC requirements. The following table gives recommended transformer characteristics. Characteristics Name Turns Ratio ...

Page 31

KS8721B/BT Package Information April 2005 48-Pin SSOP (SM) 31 Micrel, Inc. M9999-041405 ...

Page 32

... KS8721B/BT MICREL INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA + 1 (408) 944-0800 TEL This information furnished by Micrel in this data sheet is believed to be accurate and reliable. However no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. ...

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