S-1711A1818-I6T1G Seiko Instruments, S-1711A1818-I6T1G Datasheet - Page 21

• Manufacturer Part Number: S-1711A1818-I6T1G
• Description: Low Dropout (LDO) Regulators DUAL Linear LDO reg Hi70uA Iq 150mA Iout
• Manufacturer: Seiko Instruments

Specifications of S-1711A1818-I6T1G

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Rev.3.0
Explanation of Terms
1. Low dropout voltage regulator
2. Low ESR
3. Output voltage (V
4.
5. Load regulation (ΔV
6. Dropout voltage (V
Line
The low dropout voltage regulator is a voltage regulator whose dropout voltage is low due to its built-in low on-
resistance transistor.
A capacitor whose ESR (Equivalent Series Resistance) is low. The S-1711 Series enables use of a low ESR
capacitor, such as a ceramic capacitor, for the output-side capacitor C
can be used.
The accuracy of the output voltage is ensured at ±1.0% under the specified conditions of fixed input voltage
output current, and fixed temperature.
*1. Differs depending on the product.
Caution
Indicates the dependency of the output voltage on the input voltage. That is, the values show how much the output
voltage changes due to a change in the input voltage with the output current remaining unchanged.
Indicates the dependency of the output voltage on the output current. That is, the values show how much the
output voltage changes due to a change in the output current with the input voltage remaining unchanged.
Indicates the difference between the input voltage V
voltage has fallen to 98% of the output voltage value V
1.0 V, and the output voltage at that point (V
V
drop
_00
regulation
SUPER-SMALL PACKAGE 2-CIRCUIT HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
= V
IN1
If the above conditions change, the output voltage value may vary and exceed the accuracy range
of the output voltage. Please see the electrical characteristics and attached characteristics data
for details.
− (V
⎛
⎜
⎜
⎝
OUT3
ΔV
OUT
drop
ΔV
OUT2
IN
)
× 0.98)
)
OUT1
•
)
V
OUT
⎞
⎟
⎟
⎠
Seiko Instruments Inc.
OUT3
× 0.98).
IN1
, which is the input voltage (V
OUT3
after V
IN
L1
was gradually decreased from V
, C
L2
. A capacitor whose ESR is 1.0 Ω or less
IN
) at the point where the output
S-1711 Series
IN
= V
*1
OUT(S)
, fixed
21
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