MAX5915EUI Maxim Integrated Products, MAX5915EUI Datasheet - Page 17

• Manufacturer Part Number: MAX5915EUI
• Description: Hot Swap & Power Distribution
• Manufacturer: Maxim Integrated Products

Specifications of MAX5915EUI

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 2. Logic Diagram Signal Descriptions
Large capacitive loads can cause a problem when
inserting discharged PCI cards into the live backplane.
If the time needed to charge the capacitance of the
board is greater than the typical startup time, 50ms, a
fault can occur after startup.
The MAX5915/MAX5915A/MAX5916/MAX5916A are able
to withstand large capacitive loads due to their long start-
up time. Each supply has its own current-limit threshold.
Calculate the maximum load capacitance as follows:
The +12V and +3.3VAUX supplies must be above their
respective UVLO thresholds before startup can occur.
Input transients can cause the input voltage to sag
below the UVLO threshold. The MAX5915/MAX5915A/
MAX5916/MAX5916A reject input transients that are
shorter than t
The power dissipation of the external MOSFET is low
when it is on, P
amount of power is dissipated during startup and con-
tinuous short-circuit conditions. The design must take
into consideration the worst-case scenario.
Enable_+12VIN
Startup_+12VIN
Enable_3.3VAUXIN
Startup_3.3VAUXIN
OC_
UV_
SIGNAL NAME
C
BOARD
DEG, UVLO
D
______________________________________________________________________________________
= I
Maximum Load Capacitance
< 50ms x I
LOAD
External MOSFET Thermal
.
2
x R
_, LIM
Signal is HIGH:
1. +12VIN > V
2. ON_ = HIGH
3. Thermal shutdown NOT active
Signal is HIGH:
1. +12VIN > V
2. ON_ = HIGH
3. t
Signal is HIGH
1. 3.3VAUXIN > V
2. AUXON_ = HIGH
3. Thermal shutdown NOT active
Signal is HIGH:
1.
2.
3.
Signal is HIGH when an overcurrent condition exists on the output of the supply.
Signal is HIGH when an undervoltage condition exists on the output of the supply.
DS(ON)
Dual PCI 2.2 Hot-Swap Controllers
Input Transients
START
3.3VAUXIN > V
AUXON_ = HIGH
t
/ V
START
Considerations
SUPPLY
. A considerable
has elapsed
has elapsed
UVLO, +12V
UVLO, +12V
UVLO, AUX
UVLO, AUX
To take full advantage of the switch response time to an
output fault condition, keep all traces as short as possi-
ble and maximize the high-current trace dimensions to
reduce the effect of undesirable parasitic inductance.
Place the MAX5915/MAX5915A/MAX5916/MAX5916A
close to the PCI card’s connector. Use a ground plane
to minimize impedance and inductance. Minimize the
current-sense resistor trace length and ensure accurate
current sensing with Kelvin connections (Figure 9).
When an output is short circuited, the voltage drop
across the external MOSFET becomes large. Hence the
power dissipation across the switch and die tempera-
ture both increase. An efficient way to achieve good
power dissipation on a surface-mount package is to lay
out two copper pads directly under the package on
both sides of the board. Connect the two pads to the
ground plane through vias, and use enlarged copper
mounting pads on the topside of the board.
TRANSISTOR COUNT: 1021
PROCESS: BiCMOS
DESCRIPTION
Layout Considerations
Chip Information
17