MAX8654ETX-T Maxim Integrated Products, MAX8654ETX-T Datasheet - Page 13

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MAX8654ETX-T

Manufacturer Part Number
MAX8654ETX-T
Description
DC/DC Switching Regulators 12V 8A 1.2MHz Step Down Regulator
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX8654ETX-T

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
The key selection parameters for the output capacitor
are capacitance, ESR, ESL, and voltage-rating require-
ments. These affect the overall stability, output ripple
voltage, and transient response of the DC-DC converter.
The output ripple occurs due to variations in the charge
stored in the output capacitor, the voltage drop due to
the capacitor’s ESR, and the voltage drop due to the
capacitor’s ESL. Calculate the output voltage ripple due
to the output capacitance, ESR, and ESL as:
where the output ripple due to output capacitance,
ESR, and ESL is:
The peak-to-peak inductor ripple current (I
Use these equations for initial capacitor selection.
Determine final values by testing a prototype or an eval-
uation circuit. A smaller ripple current results in less
output voltage ripple. Since the inductor ripple current
is a factor of the inductor value, the output voltage rip-
ple decreases with larger inductance. Use ceramic
capacitors for low ESR and low ESL at the switching
frequency of the converter. The low ESL and ESR of
ceramic capacitors make ripple voltages negligible.
Load-transient response depends on the selected out-
put capacitance. During a load transient, the output
instantly changes by ESR x I
can respond, the output deviates further, depending on
the inductor and output capacitor values. After a short
time, the controller responds by regulating the output
voltage back to its predetermined value. The controller
response time depends on the closed-loop bandwidth.
A higher bandwidth yields a faster response time, pre-
venting the output from deviating further from its regu-
lating value. See the Compensation Design section for
more details.
V
RIPPLE
=
I
V
P P
RIPPLE C
V
V
V
RIPPLE C
RIPPLE ESR
RIPPLE ESL
=
______________________________________________________________________________________
V
( )
IN
Output Capacitor Selection
f x L
S
( )
(
(
+
V
V
OUT
=
RIPPLE ESR
)
)
8
=
=
LOAD
x C
I
I
t
P P
P P
ON
x
I
P P
OUT
(
V
OUT
V
. Before the controller
x ESR
x ESL
IN
)
x f
+
S
V
RIPPLE ESL
P-P
) is:
(
)
The input capacitor reduces the current peaks drawn
from the input power supply and reduces switching
noise in the IC. The total input capacitance must be
equal to or greater than the value given by the following
equation to keep the input ripple voltage within specifi-
cations and minimize the high-frequency ripple current
being fed back to the input source:
where V
voltage across the input capacitors and is recommend-
ed to be less than 2% of the minimum input voltage. D
is the duty cycle (V
frequency).
The impedance of the input capacitor at the switching
frequency should be less than that of the input source
so high-frequency switching currents do not pass
through the input source but are instead shunted
through the input capacitor. High source impedance
requires high input capacitance. The input capacitor
must meet the ripple-current requirement imposed by
the switching currents. The RMS input ripple current is
given by:
where I
The power-transfer function consists of one double pole
and one zero. The double pole is introduced by the out-
put filtering inductor L and the output filtering capacitor
C
mines the zero. The double pole and zero frequencies
are given as follows:
where R
DCR and the internal switch resistance, R
the output load resistance, which is equal to the rated
O
. The ESR of the output filtering capacitor deter-
Step-Down Regulator
f
P LC
1
I
RIPPLE
_
RIPPLE
IN_RIPPLE
L
is equal to the sum of the output inductor’s
=
f
P
=
is the input RMS ripple current.
2
f
C
Z ESR
_
I
LOAD
IN MIN
_
LC
12V, 8A 1.2MHz
is the maximum allowed input ripple
_
OUT
=
2
=
Input Capacitor Selection
x
π
/ V
=
2
x L x C
π
D x T x I
V
IN
V
OUT
Compensation Design
x ESR x C
IN RIPPLE
) and T
V
_
S
IN
1
x V
O
(
OUT
1
S
IN
x
O
is 1 / f
(
R
R
V
O
O
OUT
DS(ON)
+
+
S
ESR
R
(switching
)
L
)
. R
O
13
is

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