MAX1880EUG Maxim Integrated Products, MAX1880EUG Datasheet - Page 26

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MAX1880EUG

Manufacturer Part Number
MAX1880EUG
Description
DC/DC Switching Converters
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1880EUG

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Quad-Output TFT LCD DC-DC
Converters with Buffer
where η is the efficiency, f
cy (see Electrical Characteristics), and I
the primary load current and the input supply currents
for the charge pumps (see Charge-Pump Input Power
and Efficiency Considerations), linear regulator, and
VCOM buffer. Considering the typical application cir-
cuit, the maximum average DC load current
(I
above equations and assuming 85% efficiency, the
inductance value is then chosen to be 4.7µH.
The inductor’s saturation current rating should exceed
the peak inductor current throughout the normal operat-
ing range. The peak inductor current is then given by:
Under fault conditions, the inductor current may reach
up to 1.85A (I
However, the controller’s fast current-limit circuitry
allows the use of soft-saturation inductors while still pro-
tecting the IC.
The inductor’s DC resistance may significantly affect
efficiency due to the power loss in the inductor. The
power loss due to the inductor’s series resistance (P
may be approximated by the following equation:
where R
formance, select inductors with resistance less than the
internal N-channel MOSFET on-resistance (0.35Ω typ).
Use inductors with a ferrite core or equivalent. To mini-
mize radiated noise in sensitive applications, use a
shielded inductor.
Output capacitor selection depends on circuit stability
and output voltage ripple. A 10µF ceramic capacitor
works well in most applications (Tables 1 and 2).
Additional feedback compensation is required (see
Feedback Compensation) to increase the margin for
stability by reducing the bandwidth further. In cases
where the output capacitance is sufficiently large, addi-
tional feedback compensation will not be necessary.
26
MAIN(MAX)
______________________________________________________________________________________
I
PEAK
L
P
is the inductor’s series resistance. For best per-
LR
) is 300mA with an 8V output. Based on the
=
LIM(MAX)
R
I
MAIN MAX MAIN
L
I
MAIN
V
), see Electrical Characteristics).
(
IN MIN
(
OSC
)
V
V
X V
IN
)
is the oscillator frequen-
MAIN
1
Output Capacitor
2
+
MAIN
LIR
2
includes
1
η
LR
)
Output voltage ripple has two components: variations in
the charge stored in the output capacitor with each LX
pulse, and the voltage drop across the capacitor’s
equivalent series resistance (ESR) caused by the cur-
rent into and out of the capacitor:
where I
Selection). For ceramic capacitors, the output voltage
ripple is typically dominated by V
rating and temperature characteristics of the output
capacitor must also be considered.
For stability, add a pole-zero pair from FB to GND in the
form of a compensation resistor (R
a compensation capacitor (C
2. Select R
feedback resistor.
The MAX1778/MAX1880–MAX1885 contain an internal
current integrator that improves the DC load regulation
but increases the peak-to-peak transient voltage (see
the load-transient waveforms in the Typical Operating
Characteristics). For highly accurate DC load regula-
tion, enable the current integrator by connecting a
470pF (ƒ
capacitor to INTG. To minimize the peak-to-peak tran-
sient voltage at the expense of DC regulation, disable
the integrator by connecting INTG to REF. When using
the MAX1883/MAX1884/MAX1885, connect a 100kΩ
resistor to GND when disabling the integrator.
The input capacitor (C
the current peaks drawn from the input supply and
reduces noise injection. The value of C
determined by the source impedance of the input sup-
ply. High source impedance requires high input capac-
itance, particularly as the input voltage falls. Since
step-up DC-DC converters act as “constant-power”
loads to their input supply, input current rises as input
voltage falls. A good starting point is to use the same
capacitance value for C
V
V
V
RIPPLE
RIPPLE ESR
RIPPLE C
PEAK
OSC
COMP
is the peak inductor current (see Inductor
(
( )
=
= 1MHz)/1000pF (ƒ
to be half the value of R2, the low-side
)
V
RIPPLE C
V
I
MAIN
PEAK ESR COUT
IN
IN
V
( )
) in step-up designs reduces
MAIN
as for C
R
+
Feedback Compensation
COMP
V
V
IN
(
RIPPLE ESR
RIPPLE(C)
Integrator Capacitor
OUT
COMP
) as shown in Figure
C
.
OSC
OUT OSC
)
(
Input Capacitor
I
,
MAIN
) in series with
AND
f
. The voltage
IN
)
= 500kHz)
is largely

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