MAX1887EEE Maxim Integrated Products, MAX1887EEE Datasheet - Page 23

• Manufacturer Part Number: MAX1887EEE
• Description: Current Mode PWM Controllers
• Manufacturer: Maxim Integrated Products

Specifications of MAX1887EEE

• Number Of Outputs: 1
• Mounting Style: SMD/SMT
• Package / Case: QSOP-16
• Switching Frequency: 550 KHz
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Synchronous Pin: No
• Topology: Boost

In non-CPU applications, the output capacitor selection
often depends on how much ESR is needed to maintain
an acceptable level of output ripple voltage. The output
ripple voltage of a step-down controller equals the total
inductor ripple current multiplied by the output capaci-
tor’s ESR. When operating multiphase systems out-of-
phase, the peak inductor currents of each phase are
staggered, resulting in lower output ripple voltage by
reducing the total inductor ripple current. For out-of-
phase operation, the maximum ESR to meet ripple
requirements is:
This equation may be rewritten as the single phase rip-
ple current minus a correction due to the additional
phases:
where t
gation delay, η is the number of phases, and K is from
Table 3. When operating the MAX1897 in-phase (POL
= GND), the high-side MOSFETs turn on together, so
the output capacitors must simultaneously support the
combined inductor ripple currents of each phase. For
in-phase operation, the maximum ESR to meet ripple
requirements is:
The actual capacitance value required relates to the
physical size needed to achieve low ESR, as well as to
the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value (this is true of tanta-
lums, OS-CONs, and other electrolytics).
When using low-capacity filter capacitors such as
ceramic or polymer types, capacitor size is usually
determined by the capacity needed to prevent V
and V
sients. Generally, once enough capacitance is added to
meet the overshoot requirement, undershoot at the ris-
ing load edge is no longer a problem (see the V
V
R
R
R
SOAR
ESR
ESR
ESR
≤
SOAR
≤
≤
equations in the Transient Response section).
TRIG



I



LOAD MAX
L
I
η
LOAD MAX



V




from causing problems during load tran-



is the MAX1887/MAX1897’s trigger propa-
RIPPLE
V
(
(
IN
−
f
______________________________________________________________________________________
SW
η
)
LIR
)
LIR
V
OUT
=
−
η η 1






(
V
V



f
SW
RIPPLE
RIPPLE
V
η
−
V
OUT
L
IN
)






V






OUT
V
L
−
V
V
OUT
RIPPLE
IN
(
η 1
Quick-PWM Slave Controllers for
Multiphase, Step-Down Supplies



−
(



t
ON
)
(
V
V
OUT TRIG
IN
+
−
t
TRIG
V
t
SAG
OUT
)



SAG




)
and
For Quick-PWM controllers, stability is determined by
the value of the ESR zero relative to the switching fre-
quency. The boundary of instability is given by the fol-
lowing equation:
where:
For a standard 300kHz application, the ESR zero fre-
quency must be well below 95kHz, preferably below
50kHz. Tantalum, Sanyo POSCAP, and Panasonic SP
capacitors in wide-spread use at the time of publication
have typical ESR zero frequencies below 30kHz. In the
standard application used for inductor selection, the
ESR needed to support a 30mV
x 0.3) = 2.5mΩ. Eight 270µF/2V Panasonic SP capaci-
tors in parallel provide 1.9mΩ (max) ESR. Their typical
combined ESR results in a zero at 39kHz.
Don’t put high-value ceramic capacitors directly across
the output without taking precautions to ensure stability.
Ceramic capacitors have a high ESR zero frequency
and may cause erratic, unstable operation. However,
it’s easy to add enough series resistance by placing
the capacitors a couple of centimeters downstream
from the junction of the inductor and FB pin.
Unstable operation manifests itself in two related but
distinctly different ways: double-pulsing and feedback
loop instability. Double-pulsing occurs due to noise on
the output or because the ESR is so low that there isn’t
enough voltage ramp in the output voltage signal. This
“fools” the error comparator into triggering a new cycle
immediately after the minimum off-time period has
expired. Double-pulsing is more annoying than harmful,
resulting in nothing worse than increased output ripple.
However, it can indicate the possible presence of loop
instability due to insufficient ESR. Loop instability can
result in oscillations at the output after line or load
steps. Such perturbations are usually damped, but can
cause the output voltage to rise above or fall below the
tolerance limits.
The easiest method for checking stability is to apply a
very fast zero-to-max load transient and carefully
observe the output voltage ripple envelope for over-
shoot and ringing. It can help to simultaneously monitor
the switching waveforms (V
allow more than one cycle of ringing after the initial
step-response under/overshoot.
Output Capacitor Stability Considerations
f
ESR
=
f
ESR
2
π
R
≤
ESR OUT
f
SW
π
1
LX
C
and/or I
P-P
ripple is 30mV/(40A
INDUCTOR
). Don’t
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