Z8523016VSC Zilog, Z8523016VSC Datasheet - Page 11

• Manufacturer Part Number: Z8523016VSC
• Description: IC 16MHZ ESCC 44-PLCC
• Manufacturer: Zilog

Specifications of Z8523016VSC

• Controller Type: Serial Communications Controller (SCC)
• Interface: Bus
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 7mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-LCC (J-Lead)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3055

PS005308-0609
Note:
Pin Descriptions Exclusive to the Z85230/L
Pin Descriptions Exclusive to the Z80230
WR and RD going Low simultaneously is interpreted as a Reset.
INT (Interrupt (Output, Open-Drain, Active Low))—
requests an interrupt. The INT is an open-drain output.
INTACK (Interrupt Acknowledge (Input, Active Low))—
cates that an Interrupt Acknowledge Cycle is in progress. During this cycle, the ESCC
interrupt daisy chain is resolved. The device can return an interrupt vector that may be
encoded with the type of interrupt pending. During the acknowledge cycle, if IEI is High,
the ESCC places the interrupt vector on the data bus when RD goes active for the Z85230/
L, or when DS goes active for the Z80230. INTACK is latched by the rising edge of
PCLK.
The pin description for pins exclusive to Z85230/L is provided below:
Pins D7–D0 (Data Bus (Bidirectional, tristate))—
to and from the Z85230/L.
CE (Chip Enable (Input, Active Low))—
Write operation.
RD ((Read (input, Active Low))—
Z85230/L is selected, enables the Z85230/L’s bus drivers. During the Interrupt Acknowl-
edge cycle, RD gates the interrupt vector onto the bus if the Z85230/L is the highest prior-
ity device requesting an interrupt.
WR (Write (Input, Active Low))—
Write operation, which indicates that the CPU writes command bytes or data to the
Z85230/L write registers.
A/B (Channel A/Channel B (Input))—
Write operation occurs. A High selects Channel A and a Low selects Channel B.
D/C (Data/Control Select (Input))—
ferred to or from the Z85230/L. A High indicates data transfer and a Low indicates a com-
mand transfer.
The pin description for pins exclusive to Z80230 is provided below:
AD7–AD0 (Address/Data Bus (Bidirectional, Active High, tristate))—
plexed lines carry register addresses to the Z80230 as well as data or control information
to and from the Z80230.
R/W (Read/Write (Input, Read Active High))—
performed is a Read or Write operation.
When the Z85230/L is selected, this pin denotes a
This pin indicates a Read operation and, when the
This signal defines the type of information trans-
This pin selects the channel in which the Read or
This pin selects the Z85230/L for a Read or
This pin specifies if the operation to be
These pins carry data and commands
This pin activates when the ESCC
This pin is a strobe which indi-
Product Specification
Z80230/Z85230/L
These multi-
Pin Descriptions
6