ISP1761ETUM ST-Ericsson Inc, ISP1761ETUM Datasheet - Page 40

• Manufacturer Part Number: ISP1761ETUM
• Description: IC USB CTRL HI-SPEED 128TFBGA
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1761ETUM

• Controller Type: USB Peripheral Controller
• Interface: Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: ISP1761ET-T; ISP1761ET-T

NXP Semiconductors
Table 23.
[1]
ISP1761_5
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
PORTSC1 - Port Status and Control 1 register (address 0064h) bit allocation
8.2.6 PORTSC1 register
SUSP
R/W
R/W
R/W
31
23
15
R
0
0
0
7
0
PIC[1:0]
Table 22.
[1]
The Port Status and Control (PORTSC) register (bit allocation:
well. It is reset by hardware only when the auxiliary power is initially applied or in response
to a host controller reset. The initial conditions of a port are:
If the port has power control, software cannot change the state of the port until it sets port
power bits. Software must not attempt to change the state of the port until the power is
stable on the port (maximum delay is 20 ms from the transition).
Bit
31 to 1 -
0
•
•
For details on register bit description, refer to
Universal Serial Bus Rev.
No peripheral connected
Port disabled
FPR
R/W
R/W
R/W
30
22
14
R
0
0
0
6
0
Symbol Description
CF
reserved
CONFIGFLAG - Configure Flag register (address 0060h) bit description
reserved
Configure Flag: The host software sets this bit as the last action when it is
configuring the host controller. This bit controls the default port-routing control
logic.
[1]
R/W
R/W
R/W
R/W
PO
29
21
13
0
0
1
5
0
Rev. 05 — 13 March 2008
1.0”.
reserved
[1]
R/W
R/W
R/W
R/W
PP
28
20
12
0
0
0
4
0
reserved
[1]
Ref. 2 “Enhanced Host Controller Interface Specification for
[1]
R/W
R/W
R/W
R/W
27
19
11
0
0
0
3
0
LS[1:0]
PED
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
Hi-Speed USB OTG controller
PTC[3:0]
Table
reserved
ECSC
R/W
R/W
R/W
R/W
23) is in the power
25
17
0
0
9
0
1
0
© NXP B.V. 2008. All rights reserved.
ISP1761
[1]
ECCS
R/W
R/W
PR
39 of 163
24
16
R
R
0
0
8
0
0
0