DS2141AQ+T&R Maxim Integrated Products, DS2141AQ+T&R Datasheet - Page 5
![IC CONTROLLER T1 5V 44-PLCC](/photos/6/62/66291/175-44-plcc_sml.jpg)
DS2141AQ+T&R
Manufacturer Part Number
DS2141AQ+T&R
Description
IC CONTROLLER T1 5V 44-PLCC
Manufacturer
Maxim Integrated Products
Datasheet
1.DS2141AQ.pdf
(39 pages)
Specifications of DS2141AQ+T&R
Controller Type
T1 Controller
Interface
Parallel/Serial
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
10mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-LCC, 44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DS2141A REGISTER MAP
ADDRESS R/W
PIN
38
39
40
2A
2B
2C
2D
2E
2F
20
21
22
23
24
25
26
27
28
29
30
31
32
33
SYMBOL
TSYNC
TLINK
VDD
R/W Status Register 1
R/W Status Register 2
R/W Receive Information
R/W Receive FDL Match
R/W Receive FDL Match
R/W Receive Control Register
R/W Receive Control Register
R/W Receive Mark Register 1
R/W Receive Mark Register 2
R/W Receive Mark Register 3
R/W Transmit Channel
R/W Transmit Channel
R
R
R
R
R
R
Register
Bipolar Violation/ESF
Error Event Count
Register 1
Bipolar Violation/ESF
Error Event Count
Register 2
CRC6 Count Register 1
CRC6 Count Register 2
Frame Error Count
Register
Receive FDL Register
Register 1
Register 2
1
2
Not Assigned
Not Assigned
Blocking Register 1
Blocking Register 2
REGISTER NAME
TYPE
I/O
I
-
Transmit Link Data. If enabled via TCR1.2, this pin will be
sampled during the F-bit time on the falling edge of TCLK for data
insertion into either the FDL stream (ESF) or the Fs-bit position
(D4) or the Z-bit position (ZBTSI). See Section 13 for timing
details.
Transmit Sync. A pulse at this pin will establish either frame or
multiframe boundaries for the DS2141A. Via TCR2.2, the DS2141A
can be programmed to output either a frame or multiframe pulse at
this pin. If this pin is set to output pulses at frame boundaries, it can
also be set via TCR2.4 to output double-wide pulses at signaling
frames. See Section 13 for timing details.
Positive Supply. 5.0 volts.
5 of 39
ADDRESS R/W
DESCRIPTION
3A
3D
3B
3C
3E
34
35
36
37
38
39
3F
60
61
62
63
64
R/W Transmit Channel
R/W Transmit Control
R/W Transmit Control
R/W Common Control
R/W Common Control
R/W Transmit Transparency
R/W Transmit Transparency
R/W Transmit Transparency
R/W Transmit Idle Register 1
R/W Transmit Idle Register 2
R/W Transmit Idle Register 3
R/W Transmit Idle Definition
R
R
R
R
R
Blocking Register 3
Register 1
Register 2
Register 1
Register 2
Register 1
Register 2
Register 3
Register
Receive Signaling
Register 1
Receive Signaling
Register 2
Receive Signaling
Register 3
Receive Signaling
Register 4
Receive Signaling
Register 5
REGISTER NAME
DS2141A