MAX5940CESA+ Maxim Integrated Products, MAX5940CESA+ Datasheet - Page 7

IC IEEE 802.3AF PD INTFC 8-SOIC

MAX5940CESA+

Manufacturer Part Number
MAX5940CESA+
Description
IC IEEE 802.3AF PD INTFC 8-SOIC
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5940CESA+

Controller Type
Powered Device Interface Controller (PD)
Interface
IEEE 802.3af
Voltage - Supply
48V
Current - Supply
1mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
In the classification mode, the PSE classifies the PD
based on the power consumption required by the PD.
This allows the PSE to efficiently manage power distri-
bution. The IEEE 802.3af standard defines five different
classes as shown in Table 1. An external resistor (R
connected from RCLASS to V
current.
The PSE determines the class of a PD by applying a volt-
age at the PD input and measures the current sourced
out of the PSE. When the PSE applies a voltage between
12.6V and 20V, the MAX5940_ exhibit a current charac-
teristic with values indicated in Table 2. The PSE uses the
classification current information to classify the power
requirement of the PD. The classification current includes
the current drawn by the 25.5kΩ detection signature
resistor and the supply current of the MAX5940_ so the
total current drawn by the PD is within the IEEE 802.3af
standard figures. The classification current is turned off
whenever the device is in power mode.
During power mode, when V
voltage lockout threshold (V
gradually turn on the internal N-channel MOSFET Q1
Table 1. PD Power Classification/R
*Class 4 reserved for future use.
Table 2. Setting Classification Current
*V IN is measured across the MAX5940 input pins, which does not include the diode bridge voltage drop.
CLASS
0
1
2
3
4
CLASS
0
1
2
3
4
Classification Mode (12.6V ≤ V
R
CL
732
392
255
178
10k
_______________________________________________________________________________________
(Ω)
Not Allowed
Optional
Optional
Optional
USAGE
Default
12.6 to 20
12.6 to 20
12.6 to 20
12.6 to 20
12.6 to 20
V
IEEE 802.3af PD Interface Controller
IN
UVLO,ON
IN
* (V)
EE
rises above the under-
sets the classification
), the MAX5940_
CLASS CURRENT SEEN AT V
Power Mode
17.29
26.45
9.17
36.6
MIN
R
CL
0
IN
CL
10k
732
392
255
178
≤ 20V)
(Ω)
Selection
CL
)
For Power-Over-Ethernet
(see Figure 2). The MAX5940_ charge the gate of Q1
with a constant current source (10µA, typ). The drain-
to-gate capacitance of Q1 limits the voltage rise rate at
the drain of the MOSFET, thereby limiting the inrush
current. To reduce the inrush current, add external
drain-to-gate capacitance (see the Inrush Current Limit
section). When the drain of Q1 is within 1.2V of its
source voltage and its gate-to-source voltage is above
5V, the MAX5940_ asserts the PGOOD/PGOOD out-
puts. The MAX5940_ have a wide UVLO hysteresis and
turn-off deglitch time to compensate for the high
impedance of the twisted-pair cable.
The MAX5940_ operate up to a 67V supply voltage with a
default UVLO turn-on (V
(MAX5940A/MAX5940C) or 39V (MAX5940B/MAX5940D)
and a UVLO turn-off (V
MAX5940B/MAX5940D have an adjustable UVLO thresh-
old using a resistor-divider connected to UVLO (see
Figure 3). When the input voltage is above the UVLO
threshold, the IC is in power mode and the MOSFET is
on. When the input voltage goes below the UVLO thresh-
old for more than t
11.83
19.71
29.55
MAX
41.4
2
IN
(mA)
MAXIMUM POWER USED BY PD (W)
OFF_DLY
IEEE 802.3af PD CLASSIFICATION
CURRENT SPECIFICATION (mA)
0.44 to 12.95
6.49 to 12.95
0.44 to 3.84
3.84 to 6.49
Reserved*
MIN
17
26
36
0
9
, the MOSFET turns off.
UVLO,OFF
Undervoltage Lockout
UVLO,ON
) set at 30V. The
) set at 35V
MAX
12
20
30
44
4
7

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