LM8333FLQ8X/NOPB National Semiconductor, LM8333FLQ8X/NOPB Datasheet - Page 5

• Manufacturer Part Number: LM8333FLQ8X/NOPB
• Description: IC KEYPAD CTLR 32-LLP
• Manufacturer: National Semiconductor

Specifications of LM8333FLQ8X/NOPB

• Controller Type: I/O Controller
• Interface: ACCESS.bus, Microwire/SPI, USART, USB
• Voltage - Supply: 2.25 V ~ 2.9 V
• Current - Supply: 6mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LLP
• For Use With: LM8333EVALKIT - BOARD EVALUATION LM8333
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM8333FLQ8X

8.0 Typical Application
8.1 FEATURES
The following features are supported:
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8.2 I/O EXPANSION OPTIONS
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8 x 8 standard keys.
8 special function keys (SF keys) with wake-up capability
by forcing a WAKE_INx pin to ground. Pressing a SF key
overrides any other key in the same row.
A total of 72 keys can be scanned.
ACCESS.bus (I
communication with the host.
The watchdog timer is mandatory, so WD_OUT must be
connected to RESET.
One host-programmable PWM output which also may be
used as a general-purpose output.
Four host-programmable general-purpose I/O pins,
GEN_IO_0, GEN_IO_1, GEN_IO_2, and GEN_IO_3.
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C-compatible) interface for
FIGURE 1. Typical Keypad Configuration
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8.3 WATCHDOG TIMER
The watchdog timer is always enabled in hardware. To use
the timer, connect the WD_OUT output to the RESET input.
8.4 HALT MODE
The fully static architecture of the LM8333 allows stopping the
internal RC clock in Halt mode, which reduces power con-
sumption to the minimum level.
Halt mode is entered when no key-press, key-release, or
ACCESS.bus activity is detected for a certain period of time
(by default, 500 milliseconds). The mechanism for entering
Halt mode is always enabled in hardware, but the host can
program the period of inactivity which triggers entry into Halt
mode.
GEN_IO_0 and GEN_IO_1 can also be configured for
“slow” interrupts, in which any transition will trigger a
hardware interrupt event to the host.
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