VNC2-32L1B-REEL FTDI, Future Technology Devices International Ltd, VNC2-32L1B-REEL Datasheet - Page 64

IC USB HOST VINCULUM-II 32LQFN

VNC2-32L1B-REEL

Manufacturer Part Number
VNC2-32L1B-REEL
Description
IC USB HOST VINCULUM-II 32LQFN
Manufacturer
FTDI, Future Technology Devices International Ltd
Series
Vinculum-IIr
Datasheet

Specifications of VNC2-32L1B-REEL

Mfg Application Notes
Vinculum-II IO Cell Description AppNote Vinculum-II Debug Interface Description AppNote Vinculum-II IO Mux Explained AppNote Vinculum-II PWM Example AppNote Migrating Vinculum Designs AppNote
Controller Type
USB 2.0 Controller
Interface
SPI Serial, USB, UART
Voltage - Supply
1.62 V ~ 1.98 V
Current - Supply
25mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
768-1051-2
VNC2-32L1A-REEL

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
VNC2-32L1B-REEL
Manufacturer:
FTDI, Future Technology Devices International Ltd
Quantity:
10 000
Part Number:
VNC2-32L1B-REEL
Manufacturer:
FTDI
Quantity:
20 000
6.7 Parallel FIFO – Synchronous Mode
The Parallel FIFO Synchronous mode has an eight bit data bus, individual read and write strobes, two
hardware flow control signals, an output enable and a clock out.
The synchronous FIFO mode uses the parallel FIFO interface signals detailed in Table 28 and an
additional two signals detailed in Table 30.
This mode is not available on the 32 pin packages.
Available
Table 30 Synchronous FIFO control signals
6.7.1 Read / Write Transaction Synchronous FIFO Mode
When in Synchronous FIFO interface mode, the timing of read and write operations on the FIFO interface
are shown in Figure 6-23 Synchronous FIFO mode Read / Write Cycle and Table 31 Synchronous
FIFO mode Read / Write Timing
In synchronous mode data can be transmitted to and from the FIFO module on each clock edge. An
external device synchronises to the CLKOUT output and it also has access to the output enable OE# input
to control data flow. An external device should drive output enable OE# low before pulling RD# line
down.
When bursts of data are to be read from the module RD# should be kept low. RXF# remains low when
there is still data to be read. Similarly when bursts of data are to be written to the module WR# should
be kept low. TXE# remains low when there is still space available for the data to be written.
Package
11, 15,
19, 24,
28, 39,
43, 47,
51, 57,
12, 16,
20, 25,
29, 40,
44, 48,
52, 58,
64 Pin
pins
61
62
Available
Package
11, 15,
20, 31,
35, 41,
21, 32,
36, 42,
48 Pin
12,16,
pins
45
46
Copyright © 2010 Future Technology Devices International Limited
Available
Package
12, 24,
32 Pin
11, 23
pins
29
30
VINCULUM-II EMBEDDED DUAL USB HOST CONTROLLER IC Datasheet
fifo_clkout
fifo_oe#
Name
Type
I/O
I/O
FIFO Output enable
FIFO Clock out
Description
Document No.: FT_000138
Clearance No.: FTDI#
Version -
143
1.2
64

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